3D NAND Memory Strings With Conductor-Tier Electrical Coupling

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing memory array fabrication methods face challenges in efficiently forming vertically-stacked memory cells with reliable electrical connections and structural integrity, particularly in NAND architecture, which affects the performance and reliability of non-volatile memory devices.

Innovation Solution

A method involving 'gate-last' or 'replacement-gate' processing is employed to form memory arrays with strings of memory cells, using alternating conductive and insulative tiers, where channel openings are formed through these tiers to create individual memory cells with conductive coupling to a conductor tier, and sacrificial materials are replaced with conducting materials to establish wordlines, ensuring robust electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional memory array fabrication methods are used, then manufacturing process is simpler, but electrical coupling reliability and material integrity deteriorate

Engineering Contradiction:

Improveelectrical coupling reliabilityVSAvoidfabrication process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming a conductor tier before forming the memory block regions, establishing a stable electrical foundation in advance. The conductor tier is formed with specific materials and structures that prepare the substrate for subsequent memory cell formation, ensuring reliable electrical coupling is established before other components are added.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent segments the memory array into distinct functional tiers: a conductor tier for electrical coupling, memory block regions with alternating conductive and insulative tiers, and channel-material strings. This segmentation allows each component to be optimized independently while ensuring proper electrical isolation and coupling between layers.

Inventive Principle:

Principle #1Segmentation

2Ease of manufacture

If material composition is simplified, then manufacturing is easier, but etching protection and material differentiation deteriorate

Engineering Contradiction:

Improvematerial deposition easeVSAvoidmaterial differentiation precision

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent employs composite materials by specifying multi-component material compositions for different tiers. The conductor tier uses conductive materials, while memory blocks alternate between conductive and insulative materials. Channel-material strings use semiconductive materials with specific doping configurations, creating distinct material signatures that enable precise differentiation during fabrication.

Inventive Principle:

Principle #40Composite materials

Solution Approach 2:

The patent applies local quality by assigning different material compositions to specific regions and tiers. Each memory block region has locally optimized material stacks with alternating conductive and insulative properties, while channel-material strings have locally controlled doping profiles. This local differentiation enables precise etching and processing while maintaining overall manufacturing feasibility.

Inventive Principle:

Principle #3Local quality

3Productivity

If conductor tier structure is simplified, then fabrication is faster, but electrical coupling between channel material and conductor tier deteriorates

Engineering Contradiction:

Improvefabrication speedVSAvoidelectrical coupling integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent transitions from planar electrical coupling to three-dimensional vertical coupling by forming a conductor tier that extends beneath and connects to multiple memory block regions. The conductor tier creates vertical electrical pathways through the alternating conductive and insulative tiers, enabling efficient charge transport in the vertical dimension while maintaining fabrication efficiency.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The conductor tier serves multiple functions simultaneously: it provides electrical coupling to channel-material strings, acts as a common reference potential for multiple memory blocks, and enables charge transport across the memory array. This multi-functionality achieves reliable electrical coupling without requiring separate structures for each function, maintaining fabrication productivity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12614590B2Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells

Publication Date: 2026.04.28 MICRON TECHNOLOGY INC

AI summary

A memory array comprising strings of memory cells comprises a conductor tier comprising conductor material. Laterally-spaced memory blocks individually comprise a vertical stack comprising alternating insulative tiers and conductive tiers. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Conducting material of a lowest of the conductive tiers directly electrically couples together the channel material of individual of the channel-material strings and the conductor material of the conductor tier. An uppermost portion of the conductor material comprises conductively-doped semiconductive material that is directly against the conducting material, of different composition from that of the conducting material, and comprises at least one of carbon, nitrogen, oxygen, metal, and n-type conductively-doped semiconductive material also comprising boron. Other embodiments, including method, are disclosed.