NAND Memory Dual Mode Operation for Interconnection Short-Circuiting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
NAND-type flash memory systems face reduced storage capacity and increased chip defect rates due to interconnection short-circuiting between word lines, leading to unusable blocks and decreased manufacturing yield.
Innovation Solution
Implementing two operation modes, normal and bundle, in the memory system, where one word line can be selected in normal mode and both word lines in bundle mode, allowing for data storage and read operations even in blocks with interconnection short-circuiting, thereby preventing block degradation and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interconnection short-circuiting between word lines occurs, then manufacturing yield and storage capacity are reduced, but implementing dual operation modes increases device complexity
Solution Approach 1:
The memory device dynamically switches between normal mode and bundle mode based on detection results. The operation mode is not fixed but adapts according to the interconnection status, allowing the system to optimize performance and reliability under different conditions without requiring permanent structural changes
Solution Approach 2:
The memory device is designed to perform multiple functions through two operation modes: normal mode for standard operations and bundle mode for handling blocks with interconnection short-circuiting. This multi-functionality allows the same hardware to adapt to different operational requirements and maintain storage capacity despite manufacturing defects
2Reliability
If blocks with interconnection short-circuiting are made unusable, then storage capacity is reduced, but detecting and isolating these blocks increases inspection complexity
Solution Approach 1:
The memory device performs self-diagnosis by detecting interconnection short-circuiting between word lines itself, without requiring external inspection equipment. The detection function is integrated into the memory device, allowing it to identify problematic blocks and switch to bundle mode autonomously
Solution Approach 2:
The memory device performs preliminary detection of interconnection short-circuiting during manufacturing or initialization, before actual data storage operations begin. This allows problematic blocks to be identified and the device to be configured in bundle mode in advance, preventing data integrity issues before they occur
Data Source
AI summary
According to one embodiment, a memory system includes: a semiconductor memory device; and a controller. The semiconductor memory device includes: first interconnection layers; second interconnection layers; a semiconductor pillar. The semiconductor memory device executes an operation in a first mode or in a second mode. In the first mode, the device selects a third interconnection layer among the first interconnection layers independently with a fourth interconnection layer among the second interconnection layers. In the second mode, the device selects a fifth interconnection layer among the first interconnection layers and sixth interconnection layer among the second interconnection layers in a batch. The controller sends an instruction to the device to execute the operation in the first mode or the second mode.