NAND Memory Parity Generation for Garbage Collection Bottlenecks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As memory cell density increases in NAND flash memory, the computational resources and parity buffers required for generating RAID parity data become insufficient, leading to inefficiencies in garbage collection operations and reduced performance due to the need for swap operations between parity buffers and memory devices.

Innovation Solution

The memory system generates RAID parity data only after reading data from the target block when it reaches a threshold size, allowing for reduced storage space in parity buffers and minimizing swap operations, thereby maintaining efficiency and performance during garbage collection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If parity data is generated continuously during garbage collection operations, then data protection is maintained, but computational resources and parity buffer requirements become insufficient

Engineering Contradiction:
Improvedata protectionVSAvoidparity buffer requirements
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies preliminary action by writing data to the target block first, and only generating parity data after the data reaches a threshold size. This reverses the conventional approach where parity is generated immediately, allowing the system to defer computational resources and buffer usage until necessary, thereby reducing peak parity buffer requirements during garbage collection operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If parity buffers are increased to accommodate continuous parity generation, then data protection is maintained, but swap operations between parity buffers and memory devices are required, reducing performance

Engineering Contradiction:
Improvedata protectionVSAvoidgarbage collection performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By deferring parity generation until data reaches a threshold size in the target block, the patent eliminates the need for intermediate swap operations between parity buffers and memory devices. The parity is generated in one operation after data accumulation, improving garbage collection performance by avoiding performance-degrading swap operations.

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If memory cell density is increased, then storage capacity is improved, but computational resources required for parity generation become insufficient

Engineering Contradiction:
Improvestorage capacityVSAvoidcomputational resources
Core Design Contradiction:
Quantity of substanceVSPower

Solution Approach 1:

The patent addresses the computational resource constraint by implementing a threshold-based approach where data is accumulated in the target block first, and parity generation is triggered only when the threshold is reached. This batching approach reduces the frequency and intensity of computational operations, making high-density storage feasible with limited computational resources.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the need for additional storage space in parity buffers, enhances overall system performance, and maintains data protection by generating parity data efficiently without requiring swap operations.

Implementation Method 1

generating parity data includes performing a first exclusive OR (XOR) operation on the first data and the second data

Methodology Applied
Scientific EffectXOR operation:

Data Source

PatentUS20260037376A1Methods, apparatuses, and systems for managing parity data generation in a memory system
Publication Date: 2026.02.05 YANGTZE MEMORY TECH CO LTD
  • US20260037376A1 patent drawing
  • US20260037376A1 patent drawing
  • US20260037376A1 patent drawing

AI summary

Methods, systems, and computer-readable storage media for allocating memory space are provided. In one aspect, a method for operating a memory system includes writing data retrieved from a source block of a memory device of the memory system to a target block of the memory device. The method further includes, in response to determining a size of the data in the target block reaches a threshold, reading the data from the target block, generating parity data corresponding to the data, and writing the parity data to the target block.