NAND Memory Cell Read Method Isolating Selected State
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Solution Overview
Problem
Non-volatile memory devices, particularly NAND string architectures, face challenges in accurately reading the logical state of memory cells due to cell-to-cell variations in conductivity and threshold voltage, which can lead to inadvertent erasure during read operations.
Innovation Solution
A method is introduced to reliably read the logical state of non-volatile memory cells by defining a read bias condition, measuring the response of memory cells, calculating a discrepancy response to isolate the selected cell's state, and correlating it with predefined responses to determine the stored logical state, while ensuring the read threshold voltage is set far from the erase voltage to prevent accidental erasure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a read operation is performed on a memory cell in a NAND string architecture, then data can be retrieved from the memory cell, but cell-to-cell variations in conductivity and threshold voltage cause inaccurate reading and may lead to inadvertent erasure
Solution Approach 1:
The method segments the read operation into distinct phases: applying different bias conditions to different memory cells in the string, measuring responses separately, and computing a discrepancy response that isolates the selected cell's state from variations in other cells. This segmentation allows accurate reading of the selected cell while preventing inadvertent erasure of others.
Solution Approach 2:
The method changes bias parameters dynamically during the read operation. A first bias condition is applied to render selected memory cells conductive for measurement, then a second bias condition is applied to compute the discrepancy response. The read threshold voltage is specifically set far from the erase voltage to prevent erasure while enabling accurate reading.
2Measurement precision
If the read threshold voltage is set close to the erase voltage to improve reading sensitivity, then reading accuracy improves, but inadvertent erasure of memory cells occurs
Solution Approach 1:
The method performs preliminary measurements under a first bias condition to establish baseline conductivity values for all memory cells before the actual read operation. This preliminary action allows the system to later compute a discrepancy response that compensates for cell-to-cell variations, enabling accurate reading with a read threshold voltage safely distant from the erase voltage.
Solution Approach 2:
The method introduces an intermediary computational step - the discrepancy response calculation - that acts as a mediator between the raw measurement data and the final logical state determination. This intermediary process isolates the selected cell's state from parasitic effects and variations in other cells, enabling accurate reading without requiring the read threshold to be close to the erase voltage.
3Ease of manufacture
If conventional read methods are used in high-density memory devices, then manufacturing complexity is reduced, but parasitic effects from other memory cells in the string degrade reading accuracy
Solution Approach 1:
The method extracts and isolates the selected memory cell's response from the collective response of all memory cells in the string. By computing the discrepancy between measurements taken under different bias conditions, the method extracts the specific logical state of the selected cell while eliminating parasitic effects from other cells, achieving high reading accuracy in high-density architectures.
Data Source
AI summary
In an embodiment of the invention, a method of operating an integrated circuit for reading the logical state of a selected one of a plurality of memory cells included within a memory cell string in the integrated circuit is provided.