NAND Memory Read Control for Retention-Induced Threshold Shifts
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Solution Overview
Problem
As NAND type flash memories miniaturize, interference between adjoining cells and data retention deterioration due to electron discharge from charge accumulation layers lead to failed data reading operations, especially when data remains un-accessed for long periods.
Innovation Solution
A nonvolatile semiconductor memory device employs a control circuit that executes a first and second reading operation, adjusting the voltage between the control gate electrode and source of the selected memory cell to prevent erroneous reading by using positive voltages and raising the source line voltage to compensate for threshold voltage shifts caused by data retention deterioration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND type flash memory is miniaturized to increase capacity, then storage density is improved, but interference between adjoining cells and data retention deterioration increase
Solution Approach 1:
The control circuit performs a preliminary reading operation using a first reading voltage before the actual data reading. This preliminary action allows the system to detect threshold voltage shifts caused by data retention deterioration and adjust the reading voltage accordingly, preventing reading failures due to miniaturization-induced interference and retention issues
2Speed
If conventional reading operation is used without voltage adjustment, then reading speed is maintained, but data reading accuracy deteriorates due to threshold voltage shifts
Solution Approach 1:
The control circuit dynamically adjusts the reading voltage based on the results of the preliminary reading operation. When threshold voltage shifts are detected, the circuit switches to a second reading voltage that is higher than the first reading voltage, ensuring accurate data reading while maintaining speed through automated voltage selection
3Measurement precision
If negative voltages are used to compensate for threshold voltage shifts, then data reading accuracy is improved, but power consumption increases and voltage control complexity increases
Solution Approach 1:
Instead of using negative voltages to compensate for threshold voltage shifts, the control circuit inverts the approach by applying positive voltages higher than the conventional reading voltage. This inversion simplifies voltage control to only positive values while still achieving accurate data reading, thereby reducing power consumption and control complexity
Data Source
AI summary
A nonvolatile semiconductor memory device according to one embodiment of the present invention includes: a memory cell array and a control circuit. The control circuit executes a first reading operation and a second reading operation. The first reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between a control gate electrode and source of the selected memory cell to a first value. The second reading operation is an operation of reading a threshold voltage set in the selected memory cell by setting a voltage between the control gate electrode and source of the selected memory cell to a second value lower than the first value. When executing the second reading operation, the control circuit keeps a voltage of the control gate electrode of the selected memory cell to 0 or a positive value.