Vertical NAND Page Buffer Sensing Node Precharge and Trip Level Control

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Solution Overview

Problem

Vertical NAND flash memory devices exhibit back pattern dependency characteristics, leading to differences in threshold voltage detection during program verify operations and data read operations, which can result in performance degradation when attempting to control the sensing current.

Innovation Solution

A page buffer circuit that differentially applies the precharge and develop of the sensing node, and operates the sensing latch at different trip levels, during verification read operations and data read operations, without adjusting the development time of the sensing node.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the sensing current size is controlled to solve back pattern dependency, then threshold voltage detection accuracy is improved, but read performance or program performance decreases

Engineering Contradiction:
Improvethreshold voltage detection accuracyVSAvoidread performance
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies dynamics by making the sensing current size adjustable and adaptive rather than fixed. The sensing current is dynamically controlled based on the operation mode (program verify or data read) and back pattern characteristics, allowing the system to optimize between accuracy and performance requirements for different operational contexts.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the sensing current parameter based on operation mode and back pattern. By varying the sensing current size according to specific conditions (program verify operations versus data read operations), the system achieves accurate threshold voltage detection while maintaining optimal read performance, resolving the contradiction between precision and productivity.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the sensing current size is controlled to solve back pattern dependency, then threshold voltage detection accuracy is improved, but program performance decreases

Engineering Contradiction:
Improvethreshold voltage detection accuracyVSAvoidprogram performance
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The sensing current is dynamically adjusted based on whether the operation is program verify or data read. During program verify operations, the sensing current is optimized for accurate threshold voltage detection, while during data read operations, it is optimized for fast read performance, thus improving measurement precision without sacrificing program performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the sensing current parameter according to the operation type and back pattern conditions. This conditional parameter adjustment ensures that threshold voltage detection accuracy is improved when needed (during program verify) while program performance is maintained through optimized current levels for different operational phases.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If vertical NAND flash memory devices stack more cell layers to improve integration, then device integration is improved, but back pattern dependency increases

Engineering Contradiction:
Improvedevice integrationVSAvoidback pattern dependency
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements feedback by detecting the back pattern characteristics and using this information to adjust the sensing current size. The system monitors the actual threshold voltage detection conditions and adapts the sensing parameters accordingly, enabling high integration through stacked cell layers while compensating for the increased back pattern dependency through intelligent parameter adjustment.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

By changing the sensing current parameter based on the number of stacked layers and back pattern characteristics, the patent enables the device to achieve high integration with multiple cell layers while maintaining accurate threshold voltage detection through adaptive parameter optimization that compensates for increased back pattern dependency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250201320A1Nonvolatile memory devices with multiple operation modes
Publication Date: 2025.06.19 SAMSUNG ELECTRONICS CO LTD
  • US20250201320A1 patent drawing
  • US20250201320A1 patent drawing
  • US20250201320A1 patent drawing

AI summary

A method of operating a page buffer included in a non-volatile memory device includes determining a read mode, setting at least one condition among a capacitance of a sensing node of the page buffer, a precharge level of the sensing node, and a trip level of a sensing latch of the page buffer according to the read mode, and performing a program or read operation on a selected cell according to the at least one set condition.