NAND Memory Positive Sensing for Low-Power Read Reliability
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Solution Overview
Problem
Existing non-volatile memory devices face challenges in reducing current consumption during low power operation modes, particularly in NAND memory devices with multiple memory blocks and arrays of memory cells, which affect efficiency and reliability.
Innovation Solution
Implementing a sensing technique that switches between normal and low power operating modes, using negative sensing in normal mode and positive sensing with reduced voltage ramp rates in low power mode, along with a recovery read operation to ensure successful data sensing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If normal sensing process is used in low power mode, then sensing speed is maintained, but current consumption increases
Solution Approach 1:
The patent implements dynamic sensing mode selection that adapts between normal and low power modes based on operational requirements. The system dynamically adjusts the sensing process parameters including voltage levels and ramp rates to optimize the trade-off between sensing speed and current consumption, allowing the memory device to transition flexibly between performance and power efficiency states.
Solution Approach 2:
The patent changes key sensing parameters such as source voltage level and voltage ramp rate to reduce current consumption in low power mode. By modifying these electrical parameters, the system achieves lower power consumption while maintaining acceptable sensing functionality, directly addressing the contradiction between speed and energy use.
2Use of energy by moving object
If positive sensing with reduced voltage ramp rates is used in low power mode, then current consumption is reduced, but sensing accuracy may deteriorate
Solution Approach 1:
The patent incorporates feedback mechanisms through recovery read operations that verify sensing results. When sensing is performed in low power mode with reduced voltage ramp rates, the system uses feedback validation to detect potential accuracy issues and triggers recovery operations to correct erroneous readings, thereby maintaining sensing accuracy despite reduced power consumption.
Solution Approach 2:
The patent prepares for potential sensing errors by implementing recovery read operations as a preventive measure. Before finalizing sensing results in low power mode, the system performs additional verification reads to cushion against accuracy deterioration, ensuring reliable data retrieval even when operating with reduced voltage ramp rates.
3Use of energy by moving object
If voltage ramp rate is reduced in low power mode, then current consumption decreases, but sensing operation time increases
Solution Approach 1:
The patent implements dynamic mode switching that allows the system to transition between normal and low power sensing modes based on real-time requirements. When time is critical, the system can switch to normal mode with faster ramp rates, while when power conservation is prioritized, it uses low power mode with reduced ramp rates, optimizing the time-power trade-off dynamically.
4Measurement precision
If recovery read operation is performed, then sensing accuracy is improved, but operation time increases
Solution Approach 1:
The patent uses feedback-controlled recovery read operations that are triggered only when sensing errors are detected or suspected. Rather than performing recovery reads unconditionally, the system monitors sensing outcomes and selectively initiates recovery operations, thereby improving accuracy only when necessary and minimizing the time penalty associated with additional read operations.
Data Source
AI summary
The memory device includes sensing circuitry that senses data in the memory cells of a selected word line. If the memory device is in the first operating mode, the sensing circuitry senses the selected word line with a first sensing process that includes applying a first voltage to a source side of at least one NAND string and ramping at least one voltage applied to the memory block to a target voltage over a first duration. If the memory device is in the second operating mode, the sensing circuitry senses the selected word line with a second sensing process that includes applying a second voltage to the source side of at least one NAND string and ramping the at least one voltage applied to the memory block to the target voltage over a second duration that is greater than or equal to the first duration.


