NAND Program Verification Using Temperature-Compensated Pass Bits

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Solution Overview

Problem

Nonvolatile memory devices suffer from low data processing speed and are prone to memory cell deterioration due to temperature variations during program operations.

Innovation Solution

A semiconductor device with temperature-compensated pass permission bits that adjust the number of memory cells to be programmed based on temperature, comparing verification results to determine when to terminate the program operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If program operation is performed without temperature-based verification, then programming speed is maintained, but memory cell distribution deteriorates due to temperature variations

Engineering Contradiction:
Improvememory cell distributionVSAvoidprogram operation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs verification operations at multiple stages during the program operation (initial verification after first program pulse, and final verification after second program pulse) to proactively detect and prevent memory cell distribution deterioration before it occurs, rather than waiting for the problem to manifest

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where verification results are continuously monitored and used to control subsequent program operations. When verification fails indicating distribution deterioration, the system adjusts by applying additional program pulses or modifying program parameters to correct the issue

Inventive Principle:
Principle #23Feedback

2Reliability

If verification operation is performed frequently to prevent memory cell distribution deterioration, then reliability is improved, but operation time increases

Engineering Contradiction:
Improvememory cell distributionVSAvoidprogram operation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent employs periodic verification operations at strategically determined intervals during the program process (after initial programming phase and before completion) rather than continuous verification, balancing reliability monitoring with time efficiency

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies verification at critical partial stages of the program operation rather than exhaustive continuous verification, focusing on key transition points where distribution deterioration is most likely to occur

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12614597B2Semiconductor device and operating method using temperature-compensated pass permission bits
Publication Date: 2026.04.28 SK HYNIX INC
  • US12614597B2 patent drawing
  • US12614597B2 patent drawing
  • US12614597B2 patent drawing

AI summary

A semiconductor device may include memory strings coupled between bit lines, respectively, and a source line, each of memory strings including memory cells coupled to word lines, and page buffers coupled to the bit lines, respectively, each of page buffers configured to output a verification result by sensing data that have been stored in memory cells that are coupled to each selected word line, among the memory strings, after a start of a verification operation of a program operation. The number of memory cells that have been programmed successfully and a pass permission bit may be compared based on a temperature of the semiconductor device and the verification result after the start of the verification operation of the program operation, wherein the pass permission bit corresponds to the temperature.