NAND Memory Punch-Through Disturb Reduction via Localized Word Line Biasing
Solution Overview
Problem
Program disturb and punch-through effects in NAND memory arrays lead to unintended changes in threshold voltages of unprogrammed or programmed cells, particularly affecting source-side word lines, which existing boosting schemes fail to adequately address.
Innovation Solution
A self-boosting method is implemented where unselected word lines are biased with specific voltage levels, including ground potential and low voltage biases on the source-side, and incremental programming pulses are applied to reduce punch-through disturb by minimizing voltage drops across turned-off word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a boosting scheme biases unselected word lines with high voltage (e.g., 10V) to reduce program disturb, then program disturb is reduced, but punch-through occurs on nearby word lines causing threshold voltage increase
Solution Approach 1:
The patent applies different voltage biases to different word lines based on their position relative to the selected word line. Source-side unselected word lines receive a first bias voltage (e.g., 10V) while drain-side unselected word lines receive a second bias voltage (e.g., 0V or low voltage). This localized differentiation prevents punch-through on source-side word lines while maintaining program disturb reduction effectiveness.
Solution Approach 2:
The patent segments the word lines into distinct groups: source-side unselected word lines, drain-side unselected word lines, and the selected word line itself. Each segment receives a tailored bias voltage appropriate to its function and position, allowing independent control of punch-through and program disturb effects in different regions of the memory array.
2Manufacturing precision
If high voltage is applied to reduce program disturb, then programming accuracy improves, but unintended state changes occur in unprogrammed cells
Solution Approach 1:
The patent applies high voltage (first bias voltage) specifically to source-side unselected word lines where punch-through is most problematic, while applying low or zero voltage to drain-side unselected word lines. This localized approach maintains programming accuracy in the target area while preventing unintended state changes in other areas through selective voltage application.
Data Source
AI summary
A punch-through disturb effect in a memory device can be reduced by biasing a selected word line at a program voltage to program a selected memory cell, biasing word lines on the drain side of the series string with a Vpass voltage, turning off an adjacent memory cell to the selected memory cell, and biasing remaining word lines on the source side of the turned-off memory cell with a Vlow voltage that is less than Vpass.