NAND Read-Level Calibration with Selective Data Collection Skipping

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Solution Overview

Problem

Conventional memory systems experience increased latency and performance issues due to unnecessary collection and reporting of calibration-related information during read voltage level calibration processes in NAND-type memory devices, particularly in scenarios where read voltage levels have already converged.

Innovation Solution

Implementing a read-level-skip coarse threshold estimate read process that selectively skips the collection of calibration-related information for certain read voltage levels, using a parameter to determine which levels to sense and report, thereby focusing on uncalibrated levels for faster calibration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If calibration-related information is collected for all read voltage levels, then comprehensive calibration data is obtained, but latency and power consumption increase

Engineering Contradiction:
Improvecalibration data completenessVSAvoidcalibration latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts only the necessary calibration information collection actions from the overall calibration process. By identifying that some read voltage levels have already converged to target criteria, the system removes the unnecessary information collection steps for those levels, retaining only the essential collections for levels that still require calibration.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by collecting calibration information for only a subset of read voltage levels rather than all levels. The system determines which specific levels need calibration based on convergence status, performing information collection partially rather than completely, thereby reducing latency while maintaining calibration effectiveness.

Inventive Principle:
Principle #16Partial or excessive action

2Measurement precision

If calibration information is collected for all read voltage levels, then accurate calibration is achieved, but power consumption increases

Engineering Contradiction:
Improvecalibration accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates redundant power-consuming operations by identifying read voltage levels that have already converged. Information collection is stopped for these converged levels, removing unnecessary energy expenditure while preserving the accuracy needed for levels that still require calibration.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system performs power-efficient partial calibration by applying information collection only to the extent necessary - specifically to read voltage levels that have not yet converged to target criteria. This partial application of the calibration process reduces overall power consumption while maintaining required calibration accuracy.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If information collection is performed for all read voltage levels, then complete calibration coverage is ensured, but calibration speed decreases

Engineering Contradiction:
Improvecalibration coverageVSAvoidcalibration speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts unnecessary calibration steps by identifying and excluding read voltage levels that have already converged to target criteria. By removing these redundant steps from the calibration process, the system maintains reliable coverage of only the necessary levels while significantly improving calibration speed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system implements partial calibration coverage focused specifically on read voltage levels that require it. Rather than uniformly calibrating all levels, the patent applies calibration actions partially and selectively to uncalibrated levels, thereby achieving both complete necessary coverage and enhanced calibration speed.

Inventive Principle:
Principle #16Partial or excessive action

4Reliability

If all read voltage levels are calibrated, then comprehensive error handling is achieved, but command timeout risk increases

Engineering Contradiction:
Improveerror handling capabilityVSAvoidcommand timeout risk
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and eliminates redundant calibration operations for read voltage levels that have already converged to target criteria. By removing these unnecessary operations, the system maintains comprehensive error handling for levels that need it while reducing the overall time spent in calibration, thereby lowering command timeout risk.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system applies calibration partially and selectively only to read voltage levels that have not yet converged. This partial approach ensures that error handling capability is maintained for all necessary levels while minimizing the total calibration duration, thus reducing the risk of command timeouts.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20260038623A1Read level calibration with information collection skipping
Publication Date: 2026.02.05 MICRON TECHNOLOGY INC
  • US20260038623A1 patent drawing
  • US20260038623A1 patent drawing
  • US20260038623A1 patent drawing

AI summary

Various embodiments provide for performing a read voltage level calibration process with selective skipping collection of calibration-related information on a memory device of a memory system, such as a memory sub-system. For example, some embodiments provide for performing a coarse threshold estimate (CTE) calibration process, with selective skipping of failed bit count (CFBit) information collection, on a memory system.