NAND Storage Controller Read Pass Offset for Threshold Voltage Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The threshold voltage of unselected memory cells changes due to the application of a read pass voltage during read operations in nonvolatile memory devices, necessitating the adjustment of the read pass voltage magnitude to prevent this change.
Innovation Solution
A storage controller determines an optimal read voltage and read pass offset for each sub-block based on cell count information obtained through an on-chip valley search (OVS) operation, applying these offsets to adjust the read pass voltage to minimize threshold voltage changes in unselected memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a read pass voltage is applied to unselected word lines during read operation, then unselected memory cells are turned on for proper read operation, but the threshold voltage of unselected memory cells changes
Solution Approach 1:
The patent applies different read pass voltages to different sub-blocks based on their specific threshold voltage distributions. Each sub-block receives a customized read pass voltage offset determined through OVS operations, allowing the system to maintain proper read operation while minimizing threshold voltage changes in unselected cells for each specific region.
Solution Approach 2:
The patent dynamically adjusts the read pass voltage parameter by determining optimal read pass offsets for each sub-block through on-chip valley search operations. These offsets are stored and applied during subsequent read operations, changing the voltage parameter adaptively to reduce threshold voltage shifts while maintaining operational correctness.
2Stability of the object's composition
If the read pass voltage magnitude is adjusted to prevent threshold voltage changes, then memory cell stability is improved, but the complexity of voltage control increases
Solution Approach 1:
The patent performs preliminary OVS (on-chip valley search) operations during manufacturing or initialization to determine the optimal read pass offsets for each sub-block. These offsets are pre-calculated and stored in the controller, eliminating the need for complex real-time voltage adjustment during normal read operations and simplifying the control architecture.
Solution Approach 2:
The system uses the OVS operation to automatically characterize each sub-block's threshold voltage distribution and self-determine the optimal read pass offset. This self-characterization process eliminates the need for external intervention or complex manual calibration, reducing control complexity while achieving stable threshold voltages.
3Measurement precision
If different read pass voltages are applied to different sub-blocks, then read accuracy is improved, but the complexity of voltage management increases
Solution Approach 1:
The patent divides the memory array into multiple sub-blocks, each with potentially different threshold voltage characteristics. By segmenting the memory structure and applying customized read pass voltages to each sub-block based on its specific OVS characteristics, the system achieves high read accuracy while managing voltage complexity through modular, sub-block-level control.
Data Source
AI summary
A storage device includes: a nonvolatile memory device including a plurality of sub-blocks; and a storage controller configured to determine a first optimal read voltage of a first sub-block among the plurality of sub-blocks based on first cell count information obtained by an on chip valley search (OVS) operation for the first sub-block, determine a first optimal read pass offset corresponding to the first optimal read voltage based on a magnitude of the first optimal read voltage, and provide a read command and the first read pass offset of the first sub-block to the nonvolatile memory device for applying a first optimal read pass voltage that corresponds to a difference between a default read pass voltage and the first optimal read pass offset to word lines of the first sub-block while the nonvolatile memory device reads data stored in the second sub-block.