NAND Read Retry Voltage Tables for Word Line State Variation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems face challenges in accurately reading data from NAND memory due to variations in word line states and voltage offsets, leading to read errors and inefficiencies.
Innovation Solution
A memory system and method that utilizes a first-type and second-type read retry table to adjust read retry voltages based on the state of memory blocks, accounting for different voltage offset values for edge and inner word lines, and performs multiple decode operations to enhance data reading accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single read retry voltage is used for all memory blocks, then the device complexity is reduced, but the measurement precision of read operations deteriorates due to voltage variations in different word line states
Solution Approach 1:
The patent segments the read retry voltage control into two independent tables: a first read retry table storing voltage offsets for closed memory blocks, and a second read retry table storing voltage offsets for open memory blocks. This segmentation allows the system to select appropriate voltage offsets based on the operational state of each memory block, thereby improving read accuracy without requiring a completely new complex voltage control architecture.
Solution Approach 2:
The patent applies local quality by providing different voltage offset values for different regions within the same memory block. Specifically, edge word lines (adjacent to blank word lines) receive different voltage offsets from inner word lines (spaced from blank word lines). This localized differentiation compensates for the specific voltage variations experienced by word lines in different positions, improving overall read precision while maintaining manageable system complexity.
2Reliability
If voltage offset compensation is applied to all word lines uniformly, then the manufacturing precision is simplified, but the reliability of read operations deteriorates due to position-dependent voltage variations
Solution Approach 1:
The patent divides the memory block into different operational states (open and closed) and creates separate read retry tables for each state. This segmentation ensures that the appropriate voltage offset is selected based on the actual state of the memory block, improving read operation reliability. The system determines whether a memory block is open or closed and retrieves the corresponding voltage offsets from the appropriate table, ensuring reliable reads while managing complexity through structured organization.
Solution Approach 2:
The patent implements local quality by differentiating voltage offsets for edge word lines versus inner word lines within open memory blocks. Edge word lines, which are adjacent to blank word lines, experience different voltage conditions compared to inner word lines. By providing position-specific voltage offsets, the system improves read reliability for all word lines while organizing the voltage offset management in a structured manner that balances complexity.
3Measurement precision
If multiple read retry tables are implemented for different memory block states, then the measurement precision of read operations is improved, but the device complexity increases due to additional voltage offset management
Solution Approach 1:
The patent segments the voltage offset storage into two distinct read retry tables: one for closed memory blocks and one for open memory blocks. This segmentation improves read voltage precision by ensuring that the correct voltage offsets are applied based on the memory block state. The complexity is managed through clear organization and state-based selection logic, where the system determines the block state and retrieves from the appropriate table, making the complexity systematic rather than chaotic.
Solution Approach 2:
The patent applies local quality within the read retry tables by providing different voltage offset values for different word line positions (edge vs. inner word lines). This local differentiation improves read voltage precision for specific word lines. The complexity of managing multiple offset values is organized through the table structure, which groups offsets by memory block state and word line position, making the system manageable despite the increased precision requirements.
Data Source
AI summary
A memory system includes: a memory device including a plurality of memory blocks, each of which including a plurality of word lines and a plurality of memory cells coupled to the plurality of word lines; a memory controller coupled to the memory device and configured to: acquire a read retry voltage with both a first-type read retry table and a second-type read retry table; control the memory device to perform a read retry operation with the read retry voltage.