NAND Memory Read-Voltage Correction Across Block Groups

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Solution Overview

Problem

Existing memory systems with NAND flash memory face challenges in optimizing read voltage correction to improve data reading accuracy and efficiency, particularly in managing threshold voltage distributions and error correction.

Innovation Solution

A memory system with a memory controller that calculates and updates correction amounts for read voltages based on representative correction amounts and conversion correction amounts, using a volatile memory to store correction information and manage memory blocks effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If read voltage correction is performed for all memory blocks, then data reading accuracy is improved, but processing overhead and time increase

Engineering Contradiction:
Improvedata reading accuracyVSAvoidprocessing overhead
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The memory blocks are divided into two groups: first memory blocks that have been previously corrected and second memory blocks that have not been corrected. This segmentation allows the system to apply different correction strategies to different blocks, processing only the uncorrected blocks while reusing correction data from previously processed blocks, thereby reducing overall processing overhead while maintaining reading accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs read voltage correction in advance for memory blocks during initial processing or maintenance operations. By pre-correcting the read voltage for second memory blocks using conversion correction amounts derived from first memory blocks, the system eliminates the need for time-consuming correction operations during actual data read operations, thus reducing processing overhead while ensuring accurate data reading.

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If conversion correction amounts are calculated for all memory blocks, then correction consistency is improved, but calculation complexity and time increase

Engineering Contradiction:
Improvecorrection consistencyVSAvoidcalculation complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

Instead of calculating conversion correction amounts independently for each memory block, the system copies and reuses correction amounts from first memory blocks (which have known correction data) to generate correction amounts for second memory blocks. This copying approach ensures consistent correction across all blocks while dramatically reducing calculation complexity and processing time.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The correction amounts calculated for first memory blocks are made universally applicable to second memory blocks through the conversion process. A single set of correction data serves multiple purposes and multiple memory blocks, reducing the overall calculation burden while maintaining correction consistency across the entire memory system.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If correction amounts are stored in volatile memory, then correction speed is improved, but data loss risk increases

Engineering Contradiction:
Improvecorrection speedVSAvoiddata loss risk
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system is designed to recalculate or regenerate correction amounts for second memory blocks using the conversion process based on data from first memory blocks. This self-service capability ensures that even if correction data in volatile memory is lost, the system can reconstruct the necessary correction information without external intervention, thereby maintaining reliability while utilizing fast volatile memory for active correction operations.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20260004866A1Memory system
Publication Date: 2026.01.01 KIOXIA CORP
  • US20260004866A1 patent drawing
  • US20260004866A1 patent drawing
  • US20260004866A1 patent drawing

AI summary

According to one embodiment, a non-volatile memory includes a plurality of groups and a memory controller configured to execute a first operation. Each of the plurality of groups includes a plurality of cell units. Each of the plurality of cell units includes a plurality of memory cells. The first operation includes: based on a first correction amount associated with a target group, reading data from the target group; and updating the first correction amount to a second correction amount based on the data. The memory controller is configured to: select a first group as the target group; and when a condition is satisfied, select a second group as the target group after performing the first operation related to the first group.