NAND Memory Cell With Resistive Gate Component
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Solution Overview
Problem
Existing non-volatile memory technologies, such as SONOS memory, face limitations in achieving high-density storage with multiple stable resistance states for efficient data storage and retrieval.
Innovation Solution
A non-volatile resistance random access storage circuit utilizing field effect transistors with resistive switching components formed by laminating oxide and metal layers, allowing for more than two stable states based on voltage or current applied, and controlled through a series of driving circuits for memory block operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional SONOS memory structure is used, then manufacturing process is simpler, but storage density and number of stable resistance states are limited
Solution Approach 1:
The patent employs a composite resistive switching component structure consisting of multiple oxide layers (first oxide layer, second oxide layer) and metal layers (first metal layer, second metal layer) stacked together. This composite material architecture enables the achievement of multiple stable resistance states (more than two states) which directly increases storage density, while the systematic integration of these layers into the existing transistor structure prevents excessive complexity increase
Solution Approach 2:
The patent transitions from traditional planar memory structures to a vertically stacked three-dimensional architecture where oxide and metal layers are laminated in multiple levels. This dimensional change allows for increased storage capacity within the same footprint area, achieving higher storage density without proportionally increasing device complexity
2Loss of information
If more stable resistance states are achieved through complex layering, then data storage efficiency improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent achieves multiple stable resistance states by controlling the thickness, material composition, and stacking sequence of oxide and metal layers. By precisely adjusting these physical parameters during manufacturing, the system can reliably produce more than two stable resistance states for data storage, improving data storage efficiency while keeping manufacturing precision requirements within achievable limits through parameter optimization rather than extreme precision
3Device complexity
If gate electrode is used as first metal layer of resistive component, then device complexity is reduced, but control flexibility over resistance states may be limited
Solution Approach 1:
The patent makes the gate electrode serve dual functions: as the control electrode of the field effect transistor and as the first metal layer of the resistive switching component. This multi-functional design reduces device complexity by eliminating redundant structures, while the gate electrode retains full control capability over the resistance states through voltage application, maintaining adaptability and versatility in resistance state management
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables high-density storage with superior performance by allowing multiple stable states in resistive switching components, enhancing data storage efficiency and control in memory units.
Implementation Method 1
the resistance, conductivity or conducting current of the resistive resistance changeable component has more than two stable states according to a voltage difference or a current source applied between the first terminal and the second terminal of the resistance changeable component
Data Source
AI summary
A high density NAND-type nonvolatile resistance random access storage circuit and its operations are shown herein . A unit memory cell of the circuit includes a field effect transistor (FET) with a resistance changeable component connected to its gate electrode. The field effect transistor is an n-channel field effect transistor or a p-channel field effect transistor. By applying the voltage or current between the top electrode of the resistive random access component and the FET drain or source electrode, more than two stable states can be maintained such that these states can be drawn from the FET drain or source terminal. The NAND circuit includes the above unit cell as a center to form a multi-bit memory. The circuit consists of multi-bit memories connected in series, has a NAND logic gate function, and forms output of this NAND circuit which can be drawn in a form of series output.