NAND Memory Strings Using Shorted Cells for Volatile Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional NAND memory architectures face challenges in efficiently utilizing defective memory cells for volatile storage, leading to increased demands on circuit real-estate and reduced access rates and data retention characteristics.
Innovation Solution
Repurpose blocks of memory cells with electrically shorted access lines for volatile storage, allowing flexible operation between volatile and non-volatile modes, and configure defective series-connected memory cells for volatile data storage without affecting non-volatile capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional NAND memory architectures are used to store volatile data, then non-volatile memory capacity is maintained, but circuit real-estate increases and access rates decrease
Solution Approach 1:
The patent converts defective memory cells with electrically shorted access lines, which were previously unusable, into functional volatile storage elements. By applying voltage to the control gate and sensing current flow through the shorted channel, these defective cells are transformed into viable SRAM-like cells, turning a harmful defect into a beneficial feature for increasing volatile memory capacity.
Solution Approach 2:
The patent enables memory blocks to serve dual purposes: the same NAND memory array can operate in non-volatile storage mode using traditional charge-trap mechanisms, or switch to volatile storage mode by utilizing defective cells with shorted access lines. This multi-functionality allows a single memory device to provide both persistent and temporary storage capabilities without requiring separate dedicated circuits for each function.
2Quantity of substance
If defective memory cells are repurposed for volatile storage, then volatile memory capacity increases, but data retention characteristics worsen
Solution Approach 1:
The patent implements dynamic operation where memory blocks can be selectively activated or deactivated based on whether volatile or non-volatile storage is needed. The control logic dynamically switches between operating modes, enabling the system to optimize for either fast volatile access or persistent non-volatile retention depending on the application requirements, thereby managing the trade-off between capacity and retention duration.
3Speed
If blocks with electrically shorted access lines are used for volatile storage, then access rates improve, but manufacturing precision requirements worsen
Solution Approach 1:
The patent explicitly embraces manufacturing defects (electrically shorted access lines) that would traditionally be considered failures. By designing the system to exploit these shorts as functional volatile storage elements, the patent converts manufacturing imprecision into a mechanism for achieving high-speed volatile memory operation, effectively rewarding rather than penalizing manufacturing variability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances volatile memory capacity without impacting non-volatile memory capacity, achieving access rates and data retention comparable to DRAM while optimizing circuit real-estate.
Implementation Method 1
the voltage level of the channel material structure is capacitively coupled to a control gate of the string of series-connected memory cells
Data Source
AI summary
Memories might include an array of memory cells having a plurality of strings of series-connected memory cells each formed around a respective channel material structure, and a controller configured to determine a data state stored to a selected string of series-connected memory cells in response to charge stored to its respective channel material structure.