3D NAND SLC Programming with Dynamic Prologue Selection
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Solution Overview
Problem
Existing 3D NAND Flash memory devices face inefficiencies in programming time due to redundant calculations for program parameters across subblocks with similar physical characteristics, leading to prolonged operation times in the first stage of programming operations.
Innovation Solution
Implementing dynamic prologue selection and computed program parameters for a first subblock, which are then applied to reduce the need for recalculating parameters for subsequent subblocks in the same word line, utilizing full, short, and mini first stage operations based on Word Line, Word-Line-Group, and block information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If program parameters are calculated for each subblock individually, then programming accuracy is maintained, but programming time increases due to redundant calculations
Solution Approach 1:
The block is divided into multiple subblocks, and the first stage operations are segmented into different lengths (full, short, mini) based on the relationship between current and previous subblocks. This segmentation allows the system to apply appropriate computation depth to each subblock, avoiding redundant full calculations while maintaining necessary accuracy.
Solution Approach 2:
The patent performs preliminary calculations of program parameters for a reference subblock in the first stage, then reuses these computed parameters for subsequent subblocks with similar characteristics. This preliminary action eliminates redundant calculations in later subblocks, directly reducing programming time while preserving accuracy through parameter reuse.
2Reliability
If full first stage operations are performed for every subblock, then program parameters are accurately computed, but operation time is prolonged
Solution Approach 1:
The patent dynamically adjusts the length of first stage operations based on the relationship between current and previous subblocks. Three operation modes are implemented: full first stage operations when parameters need recalculation, short first stage operations for moderate changes, and mini first stage operations when parameters can be reused. This dynamic adaptation optimizes the balance between accuracy and speed.
Solution Approach 2:
The patent changes the operational parameters (computation depth, parameter recalculation extent) of first stage operations based on detected conditions. By monitoring whether current subblock parameters differ significantly from previous subblocks, the system adjusts the extent of parameter recalculation, using full operations only when necessary and shorter operations when parameters remain stable.
3Productivity
If program parameters are reused from previous subblocks, then programming speed increases, but accuracy may decrease for subblocks with different characteristics
Solution Approach 1:
The patent implements a feedback mechanism that compares program parameters between consecutive subblocks before deciding whether to reuse parameters. The system detects parameter differences and uses this feedback to determine the appropriate first stage operation length, ensuring parameters are recalculated when differences exceed thresholds and reused when they remain within acceptable ranges.
Solution Approach 2:
The patent dynamically selects among full, short, and mini first stage operations based on real-time detection of parameter changes between subblocks. This dynamic selection ensures that parameter reuse occurs only when appropriate (maintaining accuracy) while enabling speed optimization when conditions permit, adapting to each subblock's specific characteristics.
Data Source
AI summary
NAND performance is increased by reducing the time to perform program operations. An operation to program a portion of NAND cells in a NAND memory array includes multiple stages. NAND performance is increased by reducing the time in a first stage of the multiple stages to compute parameters that are used in a second stage to perform program operation(s) and verify operation(s). The time in the first stage is reduced by enabling dynamic prologue selection to dynamically select one of multiple sets of first stage operations to be performed in the first stage for a program operation based on the Word Line (WL), WL-Group, and block information for a current program operation and a previous program operation.


