3D NAND Source Line Segmentation for Higher Withstand Voltage
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Solution Overview
Problem
Existing memory devices face challenges in improving yield and protecting the source line from arcing and insufficient withstand voltage during manufacturing processes, particularly in three-dimensional NAND flash memory structures.
Innovation Solution
The memory device incorporates a specific configuration with conductor layers, insulating members, and additional members (BSHE) that divide the conductive portion into multiple segments, enhancing the withstand voltage and protecting the source line by providing additional insulation and support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional members (BSHE) and insulating members are added to the memory device structure, then the withstand voltage of the source line is improved and reliability is enhanced, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The source line is divided into multiple segments by introducing additional members (BSHE) that extend from the substrate through the first conductor layer to the second conductor layer. These members create separate regions (first region and second region) that are electrically isolated, allowing each segment to independently withstand voltage stress and preventing arcing across the entire source line.
Solution Approach 2:
Insulating members are introduced as intermediary elements between conductive portions to prevent direct electrical contact. The insulating members are positioned between the first conductor layer and the second conductor layer, acting as mediators that block electrical breakdown and arcing while maintaining the structural framework of the memory device.
2Quantity of substance
If the memory device uses a three-dimensional structure to increase capacity, then the storage density is improved, but the manufacturing precision and yield control become more difficult
Solution Approach 1:
The three-dimensional memory structure is divided into multiple blocks, each with its own source line segments and additional members. This segmentation allows manufacturing variations to be isolated to individual blocks rather than affecting the entire array, improving yield control while maintaining high storage capacity through the vertical stacking of multiple blocks.
Solution Approach 2:
The additional members and insulating members are pre-positioned during manufacturing to provide beforehand cushioning against potential arcing and electrical breakdown. These protective structures are built in advance to compensate for manufacturing tolerances and prevent failures before they occur during device operation.
Data Source
AI summary
A memory device includes: a substrate having a memory region and an external region; a first conductor, in the memory region, being arranged apart from the substrate in a first direction; second and third conductors, in the external region, being arranged apart from the first conductor in a second direction; a first member between the first and second conductors; a second member between the second and third conductors; and an insulating member between the first and second members. The first and second members each includes a lower portion extending in the first direction and reaching below the second conductor and an upper portion having a side surface outside an extension of a side surface of the lower portion. The insulating member includes lower and upper ends located below and above each of the upper portions, respectively.