3D NAND Source Structure Segmentation for Doped Pillars

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Solution Overview

Problem

Current methods for forming heavily-doped regions in channel material pillars for three-dimensional NAND memory devices are inefficient, leading to suboptimal performance in memory devices.

Innovation Solution

The formation of integrated structures with a source structure having upper, lower, and intermediate regions, where the upper and lower regions share the same composition and join at edge locations, and the intermediate region has a different composition, is used to achieve desired heavily-doped regions through out-diffusion of dopant from conductively-doped semiconductor material into channel material pillars.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If current methods for forming heavily-doped regions are used, then the manufacturing process is simple, but the memory device performance is suboptimal

Engineering Contradiction:
Improvememory device performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The source structure is segmented into three distinct regions: an upper region, a lower region, and an intermediate region with different composition. This segmentation allows each region to serve specific functions - the upper and lower regions provide non-leaky OFF characteristics while the intermediate region enables leaky GIDL characteristics, thereby improving memory device performance without requiring completely new manufacturing approaches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The intermediate region is positioned locally between the upper and lower regions to provide specific GIDL characteristics only where needed. This local quality modification allows the patent to achieve optimal performance by concentrating the dopant diffusion function in a specific location rather than uniformly across the entire source structure.

Inventive Principle:
Principle #3Local quality

2Productivity

If heavily-doped regions are formed to improve memory cell performance, then the memory device efficiency increases, but the manufacturing complexity increases

Engineering Contradiction:
Improvememory device efficiencyVSAvoidsource structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

By dividing the source structure into upper, intermediate, and lower regions with different compositions, the patent achieves complex doping profiles that enhance memory device efficiency. The segmentation allows precise control over dopant diffusion patterns, creating the desired heavily-doped regions in channel material pillars while maintaining a manageable structural organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The source structure is pre-configured with the three-region composition profile before the actual memory device fabrication begins. This preliminary action of establishing the compositional gradient in the source structure enables subsequent dopant diffusion processes to automatically create the desired heavily-doped regions, reducing the need for additional complex manufacturing steps later.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of memory devices with improved heavily-doped regions, balancing non-leaky 'OFF' characteristics with leaky gate-induced drain leakage (GIDL) characteristics, enhancing the performance and efficiency of memory cells.

Implementation Method 1

out-diffusion of dopant from conductively-doped semiconductor material into channel material pillars

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS20250107090A1Integrated assemblies, and methods of forming integrated assemblies
Publication Date: 2025.03.27 LODESTAR LICENSING GROUP LLC
  • US20250107090A1 patent drawing
  • US20250107090A1 patent drawing
  • US20250107090A1 patent drawing

AI summary

Some embodiments include an integrated structure having a stack of memory cell levels. A pair of channel-material-pillars extend through the stack. A source structure is under the stack. The source structure includes a portion having an upper region, a lower region, and an intermediate region between the upper and lower regions. The upper and lower regions have a same composition and join to one another at edge locations. The intermediate region has a different composition than the upper and lower regions. The edge locations are directly against the channel material of the channel-material-pillars. Some embodiments include methods of forming an integrated assembly.