3D NAND Stack Buffer Layer for Precise Tier Alignment
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Solution Overview
Problem
Conventional methods for forming integrated memory devices, such as NAND memory, face challenges in achieving precise stacking and configuration of conductive and insulative tiers, leading to issues like material shaving and impaired device performance due to misaligned openings during fabrication.
Innovation Solution
The method involves forming a stack of alternating conductive and insulative tiers, with buffer material to prevent material removal and misalignment, followed by the formation of channel-material-pillars and conductive materials within openings, and replacing certain materials with conductive ones to create vertically-extending NAND memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to form integrated memory devices, then fabrication processes are simpler, but stacking precision and alignment of conductive and insulative tiers deteriorate, causing material shaving and impaired device performance
Solution Approach 1:
The fabrication process is divided into multiple sequential stages: forming the first stack with conductive and insulative tiers, creating buffer material in trenches, forming the second stack, and then performing material replacement. This segmentation allows each stage to be optimized independently, achieving high stacking precision without overwhelming process complexity
Solution Approach 2:
Buffer material is formed in trenches between the first and second stacks before the second stack is constructed. This preliminary action prevents material shaving during subsequent processing and maintains the integrity of the conductive and insulative tiers, ensuring precise stacking without requiring overly complex real-time control
2Reliability
If openings are formed to extend through the stack, then channel-material-pillars and conductive materials can be formed, but misalignment occurs leading to material loss and impaired performance
Solution Approach 1:
Buffer material acts as an intermediary element between the first and second stacks. It prevents material from the first stack from being shaved off during the formation of the second stack, thereby preventing material loss and maintaining the reliability of the final device structure
Solution Approach 2:
The buffer material serves as a protective cushion that absorbs mechanical stress and prevents direct contact between the first stack and subsequent processing steps. This beforehand cushioning ensures that no material is shaved off during fabrication, eliminating material loss before it can occur
Data Source
AI summary
Some embodiments include an integrated assembly having a first deck. The first deck has first memory cell levels alternating with first insulative levels. A second deck is over the first deck. The second deck has second memory cell levels alternating with second insulative levels. A cell-material-pillar passes through the first and second decks. Memory cells are along the first and second memory cell levels and include regions of the cell-material-pillar. An intermediate level is between the first and second decks. The intermediate level includes a buffer region adjacent the cell-material-pillar. The buffer region includes a composition different from the first and second insulative materials, and different from the first and second conductive regions. Some embodiments include methods of forming integrated assemblies.