3D NAND Programming with State Grouping for Faster Multi-Level Writes
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Solution Overview
Problem
As memory devices shrink to smaller die sizes to reduce manufacturing costs and increase storage density, planar memory cells face challenges due to process technology limitations and reliability issues, and programming and reading multi-level memory cells become inefficient and less accurate as the number of bits stored in each cell increases.
Innovation Solution
A method for programming memory cells involves performing a first program operation to achieve N different programmed states, followed by a second program operation to reach k target states, with grouping based on coupling offsets and using specific verification voltages to ensure accuracy, particularly for triple-level and quad-level cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level programming is used to increase storage capacity in memory cells, then storage density is improved, but programming time increases
Solution Approach 1:
The patent segments the programming process into multiple passes, where each pass programs a subset of memory cells to specific target states. Instead of programming all memory cells to all possible states in a single operation, the method divides the total M states into N groups, with each pass handling a portion of the programming task. This segmentation reduces the time required for each individual programming operation while achieving the same overall storage capacity.
Solution Approach 2:
The patent applies preliminary action by performing verification operations after each programming pass to identify memory cells that have been successfully programmed to their target states. These verified cells are then excluded from subsequent programming passes, so that only cells requiring additional programming are processed in later passes. This preliminary verification and exclusion mechanism prevents redundant programming operations and reduces total programming time.
2Quantity of substance
If multi-level programming is used to increase storage capacity in memory cells, then storage density is improved, but read accuracy deteriorates
Solution Approach 1:
The patent applies local quality by using different verification voltages for different target states and different passes. Each target state has specific verification voltage requirements, and the method tailors the verification process to the specific state being programmed. This localized verification approach ensures that each state is read with the appropriate voltage threshold, maintaining optimal read margin for each individual state rather than using a uniform verification approach that would compromise accuracy.
Solution Approach 2:
The patent implements feedback through verification operations that measure whether memory cells have been successfully programmed to their target states. The results of these verification operations feed back into the programming process, allowing the system to adjust subsequent programming operations and verification thresholds. This feedback mechanism ensures that read accuracy is maintained by continuously monitoring and adjusting the programming and verification parameters based on actual cell states.
3Quantity of substance
If the number of bits stored in each memory cell increases, then storage density is improved, but programming efficiency decreases
Solution Approach 1:
The patent segments both the memory cells and the programming operations into manageable groups. Memory cells are divided into subsets, and programming operations are divided into multiple passes, with each pass targeting specific subsets of cells to specific state groups. This dual segmentation allows the system to program high-density multi-level cells efficiently by processing smaller subsets in parallel or in sequence, rather than attempting to program all cells to all states simultaneously.
Solution Approach 2:
The patent applies partial action by programming only the necessary subset of memory cells to the necessary subset of target states in each programming pass. Instead of performing exhaustive programming operations on all memory cells for all possible states in each pass, the method performs partial programming operations focused on specific cell-subsets and state-groups. This partial action approach maintains programming efficiency while achieving the required storage density.
Data Source
AI summary
The present disclosure provides a programming method, a memory device and a memory system. The method includes, based on coupling offsets, dividing target programmed states into N groups, each group corresponding to a different first programmed state, wherein an i-th group has Ki number of different target programmed states and corresponds to an i-th first programmed state. At least two groups of target programmed states have two different numbers of target programmed states. The method also includes performing a first program operation to program memory cells to respective first programmed states; and performing a second program operation to program an i-th group of memory cells at the i-th first programmed state to Ki number of different target programmed states.