NAND Memory String ECC Layout for Catastrophic Error Recovery
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Solution Overview
Problem
NAND flash memory systems face challenges in error correction beyond the limits of traditional block error correction codes, particularly when catastrophic failures such as word line failures occur, leading to uncorrectable errors and data loss.
Innovation Solution
Implementing supplemental error correction codes, like convolutional codes, that are incrementally updateable and stored along columns, allowing for error recovery even when traditional block error correction codes fail, by using two-level cells where block error correction data is stored in rows and supplemental codes are stored in columns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional block error correction codes are used for NAND flash memory, then data storage capacity is maximized, but data recovery capability under catastrophic failures deteriorates
Solution Approach 1:
The patent introduces a second dimension for error correction by implementing supplemental error correction codes along columns (vertical dimension) in addition to the traditional block error correction codes along rows (horizontal dimension). This dual-dimensional approach allows the system to recover data from catastrophic failures that would otherwise be uncorrectable, such as word line failures affecting entire rows, while maintaining high data storage capacity through efficient use of two-level cells.
2Reliability
If supplemental error correction codes are added for catastrophic failure recovery, then data recovery capability improves, but device complexity increases
Solution Approach 1:
The error correction system is segmented into two independent but complementary components: block error correction codes operating along rows and supplemental error correction codes operating along columns. Each segment handles specific types of errors independently, allowing the system to recover from catastrophic failures without requiring a complete redesign of the error correction architecture. This segmentation manages complexity by dividing the problem into smaller, more manageable parts.
Solution Approach 2:
The two-level cell structure serves multiple functions simultaneously: it stores both block error correction data in rows and supplemental error correction data in columns, enabling the same physical memory structure to support both traditional and advanced error correction schemes. This multi-functionality reduces the need for additional dedicated hardware or memory structures, thereby limiting the increase in device complexity.
3Reliability
If two-level cells are used to store both block and supplemental error correction data, then data integrity under catastrophic failures improves, but manufacturing precision requirements increase
Solution Approach 1:
The system performs preliminary error correction by applying block error correction codes during the initial write operation along rows. This preliminary action catches and corrects many errors before they can propagate, reducing the burden on the supplemental error correction codes and allowing the two-level cell structure to be used more effectively for catastrophic failure recovery without requiring extremely tight manufacturing precision.
Solution Approach 2:
The patent utilizes the ability to change the functional parameter of memory cells from single-level to two-level storage. By programming cells to operate at different threshold voltage levels, the system can store both block and supplemental error correction data in the same physical structure. This parameter change approach allows flexible use of existing manufacturing processes while achieving enhanced data integrity, without requiring fundamentally new manufacturing precision capabilities.
Data Source
AI summary
Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.