3D NAND String Select Gate Charge Trapping Prevention
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Solution Overview
Problem
The high density and throughput of 3D NAND flash memory structures lead to issues with yield and endurance due to unwanted charge trapping in string select gates, which affects the performance and reliability of memory cells.
Innovation Solution
A method is implemented in a NAND memory device with a block and sub-block architecture, where all NAND strings in a block share a group of word lines, and sub-blocks are connected to distinct subsets of NAND strings with string select lines. This involves applying specific voltage sequences during program operations to precharge and program memory cells, while suppressing charge trapping in string select gates by managing gate voltages and word line voltages to prevent hot electron injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high density 3D NAND flash memory structures are used to achieve greater storage capacity, then storage capacity increases, but unwanted charge trapping in string select gates occurs which reduces yield and endurance
Solution Approach 1:
The patent applies preliminary action by precharging the string select gates to a high voltage level before the program operation begins. This precharge is maintained throughout the program pulse application, preventing hot electrons from being injected into the string select gate during programming. By establishing this protective voltage condition in advance, the method prevents charge trapping before it can occur, thereby maintaining reliability while enabling high density operation
2Productivity
If program operations are performed on selected memory cells, then data storage is achieved, but hot electron injection causes charge trapping in string select gates
Solution Approach 1:
The patent applies preliminary anti-action by maintaining a high voltage precharge on the string select gate throughout the program operation. This precharge creates an electric field that opposes the hot electron injection process, preventing electrons generated during programming from being injected into the string select gate. The anti-action is continuously applied during the entire program pulse sequence, effectively counteracting the harmful charge trapping effect while allowing normal programming to proceed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces unwanted charge trapping, enhancing the yield and endurance of memory cells by preventing hot electron injection into the string select gates, thereby improving the overall performance and reliability of the 3D NAND memory device.
Implementation Method 1
each distinct subset of NAND strings in each sub-block is coupled to a respective string select line by which gate voltages are applied to the string select gates of the NAND strings in the distinct subset
Implementation Method 2
applying word line voltages at precharge levels to the group of word lines of a selected block, and a gate voltage having a first voltage level to all the sub-block string select lines in a selected block to precharge the set of NAND strings
Implementation Method 3
applying a bias sequence to program selected memory cells in a selected sub-block
Implementation Method 4
suppress unwanted charge trapping in string select gates
Data Source
AI summary
A memory device has a plurality of blocks of memory cells and a plurality of bit lines, each block including a group of word lines, and a set of NAND strings. Each block in the plurality of blocks of memory cells has a plurality of sub-blocks, each sub-block including a distinct subset of the set of NAND strings of the block selected, and a respective sub-block string select line. Control circuits are configured to execute a program operation including applying word line voltages and string select line voltages at a precharge level to precharge the set of NAND strings in the selected block, then lowering the gate voltages on all the sub-block string select lines of the block, and then lowering the word line voltages on the group of word lines. Thereafter, the program of cells in a selected sub-block is executed.