NAND Flash Program Verify Using Position-Based Bit Line Voltage
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Solution Overview
Problem
As NAND strings increase in length, there is an increased risk of the Back Pattern Effect, which causes apparent increases in threshold voltages of memory cells due to lower cell currents, leading to reliability issues in data storage.
Innovation Solution
Adjusting the program verification process by accounting for the position of the word line selected for programming and the data state being verified, by applying bit line voltages during program verification based on word line position and data state, to mitigate or remove the Back Pattern Effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND strings increase in length to increase storage capacity, then storage capacity is improved, but the Back Pattern Effect causes apparent increases in threshold voltages leading to reliability degradation
Solution Approach 1:
The patent applies parameter changes by adjusting the bit line voltage during program verify operations based on the word line position. Specifically, different voltage levels are applied to compensate for the Back Pattern Effect that occurs in longer NAND strings, thereby maintaining accurate threshold voltage measurements and ensuring reliable data storage verification across the entire memory array.
2Device complexity
If the program verify process uses fixed bit line voltages, then the verification process is simple, but the Back Pattern Effect causes inaccurate threshold voltage measurements
Solution Approach 1:
The patent implements local quality by applying different bit line voltages to different word line positions during program verify. Instead of using a uniform voltage across all memory cells, the system tailors the voltage applied to each word line based on its position, thereby compensating for position-dependent effects like the Back Pattern Effect and achieving accurate threshold voltage measurements throughout the array.
Solution Approach 2:
The patent changes the bit line voltage parameter during program verify based on word line position. By dynamically adjusting the voltage level according to the specific word line being verified, the system compensates for the Back Pattern Effect and maintains measurement accuracy without requiring overly complex verification procedures.
3Productivity
If uniform bit line voltages are applied during program verify, then the verification process is fast and simple, but errors occur due to the Back Pattern Effect in longer NAND strings
Solution Approach 1:
The patent maintains verification speed by implementing a pre-defined voltage adjustment scheme based on word line position. The different bit line voltages are determined in advance according to the word line position, allowing the verification process to proceed efficiently without complex real-time calculations, while still compensating for the Back Pattern Effect to ensure reliable verification results.
Data Source
AI summary
A control circuit connected to non-volatile memory cells applies a programming signal to a plurality of the non-volatile memory cells in order to program the plurality of the non-volatile memory cells to a set of data states. The control circuit performs program verification for the non-volatile memory cells, including applying bit line voltages during program verification based on word line position and data state being verified.