NAND Memory Reference Voltage Offset Lookup Table
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Solution Overview
Problem
As memory density increases and manufacturing processes shrink, adjacent threshold voltage distributions in NAND memory cells become overlapped, leading to errors in data retrieval that exceed the capability of Error Correction Codes (ECC), necessitating the adjustment of reference gate voltages to minimize errors.
Innovation Solution
A method is introduced to find a common optimal reference voltage for NAND memory systems by using a lookup table that stores reference voltage offsets corresponding to each read reference voltage between two adjacent states and 1-bit count difference voltage offsets at different time intervals. This method allows for the accurate adjustment of reference voltages to maintain data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory density increases and manufacturing process shrinks, then storage capacity is improved, but threshold voltage distribution overlap increases causing read errors
Solution Approach 1:
The patent changes the reference voltage parameter dynamically based on cell location and threshold voltage distribution characteristics. By adjusting the reference voltage offset for different regions of the memory array, the system adapts to manufacturing variations and maintains accurate read operations even as density increases and voltage distributions overlap.
2Reliability
If reference voltage is adjusted to minimize errors, then data retrieval accuracy is improved, but calibration iteration time increases
Solution Approach 1:
The patent performs preliminary characterization of threshold voltage distributions across different regions of the memory array during manufacturing or initial operation. This pre-acquired data is stored and used to determine optimal reference voltage offsets, eliminating the need for time-consuming iterative calibration during normal operation.
Solution Approach 2:
The patent replaces the iterative mechanical adjustment process with a lookup table approach. Instead of repeatedly adjusting reference voltages through trial and error, the system uses pre-computed offset values stored in a lookup table, substituting the iterative mechanical calibration process with a direct table-based retrieval and application method.
3Reliability
If multiple read retries are performed to adjust reference voltage, then error correction is achieved, but performance degradation increases
Solution Approach 1:
The patent performs preliminary determination of optimal reference voltage offsets based on cell location and threshold voltage distribution characteristics before actual read operations. By having the correct reference voltage ready in advance through lookup tables, the system eliminates the need for multiple read retries, thereby maintaining high memory access performance while ensuring error correction.
Data Source
AI summary
This application relates to the technical field of data storage, and discloses a method for finding a common optimal reference voltage and a memory storage-system. The method includes: providing a lookup table for optimal reference voltage offset of each programmed state of target memory and a 1-bit count difference voltage offset corresponding to predetermined 1-bit count index at different time intervals; when there is a NAND device of a memory storage system with UECC or bit error rate exceeding criteria, detecting current 1-bit count difference voltage offset corresponding to the predetermined 1-bit count index, and obtaining optimal reference voltage offset in the lookup table with the current 1-bit count difference voltage offset as index; and applying the corresponding reference voltage offset to initial common reference voltage of all NAND devices of the memory storage system. This application can accurately adjust the reference voltage.