NAND Gate Write Driver Circuit for Unmuxed Bit Line Area Reduction
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Solution Overview
Problem
In semiconductor memory designs with an unmuxed bit line scheme, the write driver circuit occupies a large space, contributing to a higher height and area of the chip, which increases costs and reduces efficiency.
Innovation Solution
A write driver circuit with a NAND gate type structure is implemented, including an input latch circuit, a first write driver, and a second write driver, which eliminates the need for a multiplexer and precharge circuit, reducing the area and height of the unmuxed Y-path by using NAND gates for data transmission and precharging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If an unmuxed Y-path structure is used to maximize bandwidth, then data transmission speed is improved, but the height and area of the chip increase
Solution Approach 1:
The patent merges the precharge function and write driver function into a single circuit block. The precharge circuit is integrated within the write driver structure, eliminating the need for separate precharge circuit blocks and reducing overall chip area while maintaining the unmuxed Y-path bandwidth advantage
Solution Approach 2:
The write driver circuit is designed to perform multiple functions: it acts as both the precharge circuit and the write driver. The circuit can precharge bit lines when not in use and drive data during write operations, making it a universal circuit that eliminates the need for separate dedicated circuits
2Reliability
If traditional write driver structure is used, then data driving capability is maintained, but the write driver occupies significantly large space
Solution Approach 1:
The patent combines the precharge circuit and write driver into a single integrated circuit block. The precharge circuit is positioned within the write driver structure, sharing control signals and power supply, thereby reducing the total area occupied by these critical components while maintaining their individual functional capabilities
Solution Approach 2:
The patent reorganizes the circuit layout by transitioning from a planar arrangement of separate blocks to a vertical stacking approach. The precharge circuit and write driver are arranged in different dimensional layers, allowing them to share horizontal space while maintaining functional separation, thus reducing the overall footprint
Data Source
AI summary
A write driver circuit of a semiconductor memory to provide an unmuxed bit line scheme which reduces a height of an unmuxed Y-path so as to reduce an area of a chip in the memory. The write driver circuit can include an input latch circuit which latches input data, in response to an input enable signal; a first write driver which receives write data output from the input latch circuit, in response to a write enable signal, and outputs data to a bit line; and a second write driver which receives inverse data of the write data output from the input latch circuit, in response to the write enable signal, and outputs data to a complementary bit line, wherein the first and second write drivers have a NAND gate type structure and function as a write driver and a precharge driver.