Nano-Dot Floating Gate Memory for Leakage-Resistant Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices face challenges with high power consumption, integration difficulties, and leakage currents due to insulating layer deterioration, leading to data distortion and performance degradation.
Innovation Solution
A memory device structure with a floating gate comprising nano-dot gates, eliminating the need for a gate electrode, and utilizing nano-dot gates to store and erase data through electron or hole tunneling, with insulating layers maintaining charge isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gate electrode is included in the flash memory structure, then the memory device can store data by injecting electrons or holes into the floating gate, but the device becomes thick and rigid, requiring higher power consumption and making integration difficult
Solution Approach 1:
The patent removes the gate electrode from the traditional flash memory structure, extracting only the essential floating gate region with nano-dot gates. This extraction eliminates the thick and rigid gate electrode while maintaining the core data storage function through voltage application to the drain electrode, thereby improving integration capability.
Solution Approach 2:
The patent changes the structural parameters by replacing the continuous gate electrode with discrete nano-dot gates arranged in a specific pattern. This parameter change transforms the thick, rigid structure into a thinner, more flexible configuration that enables better integration while preserving the electron injection and data storage mechanisms.
2Device complexity
If the insulating layer deteriorates causing leakage current, then the threshold voltage changes and stored data becomes distorted, but removing the gate electrode structure eliminates this problem while improving integration
Solution Approach 1:
The patent extracts the gate electrode structure that causes insulating layer deterioration. By removing this problematic component, the patent eliminates the root cause of leakage current and threshold voltage changes, thereby preventing data distortion while simultaneously improving integration capability through the simplified nano-dot gate structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances integration, endurance, and reliability by preventing leakage currents while maintaining non-volatile data storage capabilities.
Implementation Method 1
tunneling charges into the floating gate region from the drain electrode due to the voltage applied to the drain electrode
Data Source
AI summary
An embodiment memory device includes a drain electrode disposed on a semiconductor substrate, a channel region in contact with the drain electrode, a source electrode in contact with the channel region, and a floating gate region in contact with the source electrode and the drain electrode, the floating gate region including a nano-dot region including at least one nano-dot gate, wherein the drain electrode is overlapped with the nano-dot region, and wherein the nano-dot region is overlapped with the channel region.


