Nanosheet Transistor Active Cut With SiGe Sacrificial Isolation
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Solution Overview
Problem
As semiconductor devices are scaled down for high integration, there is a need to reduce capacitance between contacts and ensure electrical stability to prevent short circuits due to gate electrodes between nanosheets.
Innovation Solution
A sacrificial layer made of silicon germanium (SiGe) is disposed on the side walls of the active cut between nanosheets to mitigate or prevent short circuits, improving the reliability of the semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the pitch size is decreased for high integration, then the device density is improved, but the capacitance between contacts increases and electrical stability deteriorates
Solution Approach 1:
The patent introduces a sacrificial layer as an intermediary substance between the gate electrode and the active cut. This sacrificial layer is deposited to fill the active cut and prevent direct contact between the gate electrode and underlying structures, thereby eliminating short circuits and improving electrical stability while maintaining high device density
Solution Approach 2:
The sacrificial layer is designed as a temporary structure that serves its purpose during fabrication and then is completely removed. This disposable approach allows the use of simple deposition processes without worrying about the long-term presence of the sacrificial material, effectively resolving the electrical stability issue while maintaining high integration
2Productivity
If the pitch size is decreased for high integration, then the device density is improved, but the capacitance between contacts increases
Solution Approach 1:
The patent extracts or removes the source of harmful capacitance by eliminating the gate electrode structure between nanosheets through the active cut. By removing this conductive element that would create parasitic capacitance, the design reduces energy loss while maintaining high device density through continued scaling
3Reliability
If a gate electrode is formed between nanosheets, then the transistor control is improved, but short circuits occur due to the gate electrode
Solution Approach 1:
The patent converts the potentially harmful situation of having a gate electrode extend between nanosheets into a beneficial structure. The gate electrode is intentionally designed to extend between nanosheets and is surrounded by an insulating layer, transforming what would be a short circuit into a controlled capacitive structure that improves transistor control while preventing harmful conduction
Data Source
AI summary
A semiconductor device including a substrate, a first and second active pattern extending in a first horizontal direction on the substrate, the second active pattern apart from the first active pattern in the first horizontal direction, first nanosheets apart from each other in a vertical direction on the first active pattern, second nanosheets apart from each other in the vertical direction on the first and second active patterns, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the first active pattern and surrounding the first nanosheets, a source/drain region between the first and second nanosheets, an active cut penetrating the second nanosheets in the vertical direction, extending to the substrate, and separating the first and second active patterns, and a sacrificial layer between the source/drain region and the active cut, in contact with the active cut, and including silicon germanium may be provided.