Nanosheet Gate Structure With Barrier Layers for Spacer Reliability
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Solution Overview
Problem
Current semiconductor devices face reliability issues with the source/drain region and inner spacer due to the placement of the inner spacer during the fabrication process, which affects the integrity and performance of the device.
Innovation Solution
The semiconductor device incorporates a first and second barrier layer made of impurity-doped silicon, strategically positioned between the inner spacer and the nanosheets, along with a gate insulating layer that contacts the side walls of the inner spacer and barrier layers, to enhance the reliability of the source/drain region and inner spacer by controlling the placement and spacing of the inner spacer during the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the inner spacer is placed between the gate electrode and source/drain region during fabrication, then the structural integrity is improved, but the reliability of the source/drain region and inner spacer deteriorates due to placement issues
Solution Approach 1:
A barrier layer is introduced as an intermediary component between the inner spacer and the nanosheet. This barrier layer acts as a mediator that prevents direct contact and potential damage between the inner spacer and nanosheet during fabrication and operation, thereby resolving the reliability issue while maintaining structural integrity.
2Quantity of substance
If the inner spacer is positioned close to the nanosheets, then the device density is improved, but the manufacturing precision deteriorates due to difficulty in controlling placement
Solution Approach 1:
The barrier layer serves as a positioning intermediary that defines the spatial relationship between the inner spacer and nanosheet. By forming the barrier layer first as a reference structure, the subsequent placement of the inner spacer can be precisely controlled relative to the nanosheet, enabling high device density while maintaining manufacturing precision.
Solution Approach 2:
The barrier layer is formed in advance before the inner spacer is introduced. This preliminary action establishes a predefined structure that guides the precise placement of the inner spacer, making it easier to control the spacing and positioning during fabrication while achieving high device density.
3Reliability
If the inner spacer is spaced apart from the nanosheets, then the reliability is improved, but the device complexity increases due to additional spacing structures
Solution Approach 1:
The barrier layer acts as a simple intermediary structure that provides the necessary spacing between the inner spacer and nanosheet. Rather than introducing complex spacing mechanisms, the barrier layer serves as a straightforward structural element that achieves the desired separation while maintaining reliability and minimizing added complexity.
Data Source
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AI summary
A semiconductor device includes: a substrate; an active pattern (101) provided on the substrate (100) and extending in a first horizontal direction; a plurality of nanosheets (NW1, NW2, NW3) spaced apart from each other in a vertical direction and stacked on the active pattern; a gate electrode (G) provided on the active pattern and extending in a second horizontal direction different from the first horizontal direction, the gate electrode surrounding each of the plurality of nanosheets; a source/drain region (SD) provided on the active pattern at two sides of the gate electrode; a first inner spacer (130) provided between the gate electrode and the source/drain region and between adjacent nanosheets of the plurality of nanosheets, the first inner spacer being spaced apart from the plurality of nanosheets in the vertical direction; and a first barrier layer (111) provided on a first side of the gate electrode and between the first inner spacer and one of the plurality of nanosheets.