Nanosheet Source/Drain Contact Structure for Lower Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in scaling down transistor sizes while maintaining device performance and efficiency, particularly in forming nanosheet channels and source/drain features for advanced field-effect transistors, where existing methods struggle to achieve optimal geometry and contact area for improved carrier mobility and drive current.
Innovation Solution
The method involves forming a stack of semiconductor layers with alternating materials of different etch selectivity, creating fin structures, and using epitaxial processes to form nanosheet channels and source/drain features, followed by the deposition of sacrificial layers and silicide formation to enhance contact area and reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor size is scaled down to increase device density, then production efficiency and cost are improved, but manufacturing precision and processing difficulty deteriorate
Solution Approach 1:
The channel region is segmented into multiple nanosheets stacked vertically, with each nanosheet providing a separate conduction path. This segmentation allows the device to achieve high density through vertical stacking while maintaining manufacturable geometry for each individual nanosheet layer
Solution Approach 2:
The invention transitions from planar 2D channel structures to 3D vertically-stacked nanosheet channels. By adding the vertical dimension, the device achieves higher effective channel width and density without requiring smaller lateral dimensions, thus avoiding the manufacturing precision challenges of extreme scaling
2Reliability
If nanosheet channel geometry is optimized to improve carrier mobility, then device performance is improved, but contact area and manufacturing complexity worsen
Solution Approach 1:
The source/drain contact structure is designed to extend underneath the gate electrode and wrap around the nanosheet channels, creating a nested configuration. This nested contact geometry increases the effective contact area with the channel without requiring additional lateral space, thus improving carrier injection while maintaining compact device footprint
Solution Approach 2:
The contact structure utilizes the vertical dimension by extending underneath the gate and making contact with the bottom surfaces of the nanosheets. This vertical contact approach increases the effective contact area without increasing lateral device dimensions, avoiding manufacturing complexity associated with larger contact areas
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of semiconductor devices with improved carrier mobility and drive current by optimizing the geometry and contact area of nanosheet channels and source/drain features, leading to enhanced device performance and efficiency.
Implementation Method 1
forming a stack of semiconductor layers with alternating materials of different etch selectivity, creating fin structures, and using epitaxial processes to form nanosheet channels and source/drain features
Implementation Method 2
converting the etch stop layer to a silicide layer, and forming a source/drain (S/D) contact on the silicide layer
Data Source
AI summary
A semiconductor device structure is provided. The semiconductor device structure includes a source/drain (S/D) feature disposed in a recess between two adjacent channel regions, wherein the S/D feature comprises an epitaxial layer conformally deposited on an exposed surface of the recess. The structure also includes a silicide layer conformally disposed on the S/D feature, and a S/D contact disposed on the silicide layer, wherein the S/D contact has a first portion extending into the recess, and the first portion has at least three surfaces being surrounded by the silicide layer and the S/D feature.