Nanosheet Logic and ESD Co-Integration With Substrate-Clamped Diodes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor technologies face challenges in co-integrating nanosheet logic, electrostatic discharge (ESD), and well-contact devices on a substrate effectively, requiring a solution that allows for reliable and cost-effective integration of these devices while ensuring electrostatic discharge protection and efficient device performance.
Innovation Solution
The integration of nanosheet field effect transistors (FETs) and ESD devices on the same substrate, with a bottom dielectric insulating layer electrically isolating the source/drains and gate regions, and ESD devices having doped source/drains in contact with the substrate to form an electrostatic discharge diode, which clamps voltage and provides low leakage and high forward-bias current capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nanosheet logic devices and ESD devices are co-integrated on the same substrate, then electrostatic discharge protection is provided, but device complexity increases
Solution Approach 1:
The patent combines nanosheet logic devices and ESD devices into a single integrated structure on the same substrate. The shared gate structure and common fabrication process merge multiple device functions into one unified device, reducing overall system complexity while maintaining ESD protection functionality.
Solution Approach 2:
The ESD device structure is designed to serve multiple functions: it provides electrostatic discharge protection while sharing common components (gate structure, substrate contact) with logic devices. This multi-functionality reduces the number of separate components needed, thereby reducing device complexity.
2Reliability
If bottom dielectric insulating layer is used to electrically isolate source/drains and gate regions, then device reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The bottom dielectric insulating layer is formed as part of the preliminary substrate preparation before nanosheet and gate structure fabrication. This preliminary action establishes the electrical isolation framework early in the process, ensuring reliability is built-in from the foundation rather than added as a complex post-processing step.
3Reliability
If doped source/drains are used in ESD devices for high forward-bias current capacity, then electrostatic discharge protection effectiveness is improved, but manufacturing complexity increases
Solution Approach 1:
The source and drain regions are doped with specific dopant types and concentrations to optimize ESD performance. By controlling doping parameters (type, concentration, depth), the device achieves high forward-bias current capacity and effective voltage clamping without requiring complex structural modifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables realistic, reliable, and cost-effective co-integration of nanosheet logic, ESD, and well-contact devices, providing effective electrostatic discharge protection and efficient device performance by utilizing nanosheet and fin-type channel structures, and doped nanosheets or fins as electrical connections for capacitors.
Implementation Method 1
electrostatic discharge device is in electrical contact with the substrate, wherein the second source/drain is doped with a second dopant type
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a first field effect device on a first region of a substrate, wherein a first gate structure and an electrostatic discharge device on a second region of the substrate, wherein a second gate structure for the electrostatic discharge device is separated from the substrate by the bottom dielectric layer, and a second source/drain for the electrostatic discharge device is in electrical contact with the substrate, wherein the second source/drain is doped with a second dopant type.