Nanosheet Transistor Dual Inner Airgap Spacers

The patent applies local quality by using different materials (silicon nitride with positive fixed charges for n-channel, aluminum oxide with negative fixed charges for p-channel) for inner spacers in different channel regions. This local differentiation enables targeted reduction of extension resistance and parasitic capacitance in each region without requiring complex global process changes.

The patent employs composite materials by combining silicon nitride and aluminum oxide as inner spacer materials in different regions of the nanosheet transistor. These composite materials provide complementary electrical characteristics that collectively reduce both extension resistance and parasitic capacitance, achieving performance improvement through material composition rather than process complexity.

The patent applies self-service through self-aligned formation of airgap spacers where the inner spacers automatically position themselves relative to the nanosheet channels during the epitaxial growth process. The spacers form conformally on the channel structures, ensuring precise positioning and tight design ground rules are met without requiring additional alignment steps or complex manufacturing control.

The patent uses preliminary action by forming the inner spacers before final gate structure fabrication. The inner spacers are deposited and patterned early in the process sequence, establishing the foundation for subsequent airgap formation and gate structure assembly. This preliminary placement ensures precise dimensional control and facilitates achieving tight design ground rules in later processing steps.