Nanospike Contactors for Semiconductor Wafer Testing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional test contactors for semiconductor devices face challenges in scaling down to smaller contact structures while maintaining high electrical performance and avoiding damage to the die, particularly due to high contact forces and resistance issues, leading to increased testing costs and device failure rates.
Innovation Solution
The use of nanospikes as designed asperities for contactors, which are smaller, more regular, and distributed over a larger area, reducing contact resistance and damage by providing a lower contact force and improved alignment, allowing for efficient testing of semiconductor devices on wafers and packaged dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Force
If conventional spring-loaded pins are used to contact solderballs, then contact force is sufficient to break through oxide layer, but contact force becomes too high and may damage the contacts on the die
Solution Approach 1:
The contactor is divided into multiple individual pins, each independently spring-loaded to contact individual solderballs. This segmentation allows each pin to apply only the necessary force to break the oxide layer without excessive force that could damage the die contacts, as each spring can be optimized for minimal effective force.
Solution Approach 2:
The spring constant and pre-compression force of each pin are carefully selected to provide just enough contact force to penetrate the oxide layer on solderballs while remaining below the threshold that would damage the underlying die contacts. This parameter optimization resolves the contradiction between sufficient contact force and avoidance of damage.
2Quantity of substance
If the number of pads/solderballs increases, then more contacts are available for complex die designs, but the total contactor force becomes very high requiring powerful mechanisms
Solution Approach 1:
The contactor applies force through many individual lightweight pins rather than a single powerful mechanism. Each pin carries only a small fraction of the total load, allowing the system to scale to hundreds of contacts without requiring proportionally high total force mechanisms, as each spring operates independently at low force levels.
3Length of moving object
If contactor size is reduced to match smaller contacts on miniaturized dies, then compatibility with modern small-scale devices is achieved, but alignment precision requirements increase
Solution Approach 1:
The contactor is segmented into many individual pins with flexible spring mechanisms that can accommodate minor misalignments. Each pin independently seeks contact with its corresponding solderball, tolerating small positioning errors that would be critical in rigid, non-segmented contactors, thereby reducing the effective alignment precision requirements.
4Productivity
If conventional pins are used for repeated testing, then testing can be performed, but oxide layer buildup and contact degradation occur over time
Solution Approach 1:
The spring-loaded pins automatically maintain optimal contact force through their elastic properties, compensating for oxide buildup and contact degradation over time. The springs continuously apply force to break through accumulating oxide layers, and the flexible contact mechanism adapts to wear, maintaining reliable electrical contact throughout the device lifecycle without manual intervention.
Data Source
AI summary
Nanospike contactors suitable for semiconductor device test, and associated systems and methods are disclosed. A representative apparatus includes a package having a wafer side positioned to face toward a device under test and an inquiry side facing away from the wafer side. A plurality of wafer side sites are carried at the wafer side of the package. The nanospikes can be attached to nanospike sites on a wafer side of the package. Because of their small size, multiple nanospikes make contact with a single pad/solderball on the semiconductor device. In some embodiments, after detecting that the device under test passes the test, the device under the test can be packaged to create a known good die in a package.