Nanowire Semiconductor Structure With Strain-Relaxed SiGe Channel
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Solution Overview
Problem
Existing methods for forming SiGe hetero-structures in semiconductor devices face issues with impurity defects and strain due to high germanium concentrations, leading to dislocation and reduced mobility, which affect transistor performance.
Innovation Solution
A method involving the formation of an amorphous Ge layer on a Si layer, followed by annealing to allow germanium atoms to diffuse into silicon, creating a single crystalline strain-relaxed SiGe structure with controlled germanium concentration, reducing impurity defects and dislocations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high germanium concentration is used to enhance hole mobility in SiGe, then transistor performance is improved, but impurity defects and dislocations increase
Solution Approach 1:
The patent applies parameter changes by precisely controlling the germanium concentration gradient in the SiGe layer. Instead of using uniform high germanium concentration, the invention employs a graded composition where germanium content varies through the layer thickness, optimizing hole mobility while maintaining acceptable defect levels. The annealing temperature and duration parameters are also optimized to achieve the desired germanium diffusion without excessive defect formation.
Solution Approach 2:
The patent implements local quality by creating a non-uniform germanium distribution within the SiGe layer. The germanium concentration is highest at the interface with the channel region where it is most needed for mobility enhancement, and decreases toward the drain region. This spatial variation in composition allows localized optimization of electrical properties while minimizing overall defect density.
2Reliability
If high germanium concentration is used to enhance hole mobility in SiGe, then transistor performance is improved, but strain-induced dislocation increases
Solution Approach 1:
The patent addresses strain-induced dislocation by carefully controlling the germanium concentration parameter and the lattice mismatch parameter. The graded SiGe structure gradually transitions from silicon to higher germanium content, reducing abrupt strain discontinuities that would otherwise cause dislocation. The annealing process parameters are optimized to relieve strain while preserving the desired germanium distribution.
Solution Approach 2:
The patent applies segmentation by dividing the SiGe layer into multiple sub-layers with progressively increasing germanium concentration. This segmented approach allows strain to be distributed and managed across multiple interfaces rather than concentrated at a single high-strain boundary, reducing the likelihood of dislocation formation while maintaining the overall germanium gradient needed for mobility enhancement.
3Manufacturing precision
If germanium atoms diffuse into silicon layer during annealing, then single crystalline structure is formed, but process complexity increases
Solution Approach 1:
The patent applies preliminary action by forming the amorphous Ge layer on the Si layer before annealing. This pre-arranged structure ensures that during the subsequent annealing process, germanium atoms have a ready reservoir from which to diffuse into the silicon, facilitating controlled crystallization. The preliminary layer formation simplifies the annealing process by pre-establishing the diffusion source and target geometry.
Solution Approach 2:
The patent uses the amorphous Ge layer as an intermediary between the initial silicon structure and the final single crystalline SiGe structure. This intermediary layer serves as a diffusion reservoir and structural template that guides the formation of the single crystalline SiGe during annealing, simplifying the overall transformation process compared to direct crystallization attempts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method results in a SiGe structure with improved mobility and reduced defects, suitable for various transistor architectures, enhancing transistor performance by mitigating strain-related issues.
Implementation Method 1
annealing to allow germanium atoms to diffuse into silicon
Implementation Method 2
annealing to allow germanium atoms to diffuse into silicon
Implementation Method 3
transform the Si layer and the Ge layer to form a single crystalline SiGe layer
Data Source
AI summary
A semiconductor structure includes a substrate, a nanowire disposed over the substrate, a metal gate electrode layer and a gate dielectric layer. A dielectric layer is formed on the substrate. The nanowire has a first portion and a second portion. The nanowire has a first portion and a second portion, the first portion of the nanowire comprises a first semiconductor layer and a second semiconductor layer surrounded by the first semiconductor layer, the second portion comprises the second semiconductor layer. The metal gate electrode layer surrounds the first portion of the nanowire. The gate dielectric layer is disposed between the metal gate electrode layer and the nanowire.