Necking Flip-Chip Bumps for Thermal Stress Absorption
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Solution Overview
Problem
Conventional flip chip packages experience stress and warping due to differing thermal expansion coefficients of materials during packaging, leading to substrate bowing, warping, or cracking, especially in semiconductor chips with extreme low dielectric layers, which can result in delamination and IC failure.
Innovation Solution
The use of conductive bumps with non-uniform cross-sectional areas and reduced volume, configured as necking pillars, to absorb internal stresses and prevent delamination in dielectric layers, enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the size and number of conductive bumps are increased to reduce stress, then stress absorption improves, but bump pitch limitation and IC metal trace routing area constraint are violated
Solution Approach 1:
The conductive bump features a non-uniform cross-sectional area with a narrower upper portion and wider lower portion, creating local quality variations that optimize stress distribution. The necking portion concentrates stress in a specific region, allowing effective stress absorption without increasing overall bump size or number.
Solution Approach 2:
The invention changes the geometric parameters of the conductive bump by introducing a non-uniform cross-sectional area profile. This parameter modification allows the bump to absorb stress more effectively while maintaining compact dimensions that fit within existing pitch and routing constraints.
2Ease of manufacture
If conventional uniform conductive bumps are used, then manufacturing is simpler, but thermal expansion stress causes substrate warping and delamination
Solution Approach 1:
The conductive bump features a non-uniform cross-sectional area with a narrower upper portion and wider lower portion, creating local quality variations that optimize stress distribution. The necking portion concentrates stress in a specific region, allowing effective stress absorption without increasing overall bump size or number.
Solution Approach 2:
The invention changes the geometric parameters of the conductive bump by introducing a non-uniform cross-sectional area profile. This parameter modification allows the bump to absorb stress more effectively while maintaining compact dimensions that fit within existing pitch and routing constraints.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The non-uniform conductive bumps effectively absorb thermal stresses, preventing substrate warping and delamination, thereby improving the reliability and integrity of semiconductor packages.
Implementation Method 1
the package is highly stressed due to the different coefficients of thermal expansion (CTE) of the various package substrate and chip materials
Data Source
AI summary
A semiconductor structure includes a semiconductor chip, a substrate and a plurality of bump segments. The bump segments include a first group of bump segments and a second group of bump segments collectively extended from an active surface of the semiconductor chip toward the substrate. Each bump segment of the second group of bump segments has a cross-sectional area greater than a cross-sectional area of each bump segment of the first group of bump segments. The first group of bump segments includes a first bump segment and a second bump segment. Each of the first bump segment and the second bump segment includes a tapered side surface exposed to an environment outside the bump segments. A portion of a bottom surface of the second bump segment is stacked on the first bump segment, and another portion of the bottom surface of the second bump segment is exposed to the environment.