Negative Bitline Write Assist for Ultra-Low-Voltage Memory
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Solution Overview
Problem
The challenge of effectively and efficiently performing write operations in memory cells with reduced supply voltages is exacerbated by increased leakage currents and power consumption, which complicates data writing in memory arrays.
Innovation Solution
A write assist circuit is introduced, comprising a negative voltage generator and a leakage control circuit, which generates a negative voltage to improve write operations and reduces leakage currents by applying it to selected and unselected bitlines, ensuring proper data writing and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If supply voltages are reduced to prevent transistor damage and reduce power consumption, then transistor safety and overall power consumption are improved, but write operation effectiveness and speed deteriorate
Solution Approach 1:
The patent introduces negative voltage as a new voltage parameter to enhance write operation effectiveness. By applying negative voltage to the bitline during write operations, the voltage differential across the memory cell is increased, enabling faster and more effective data writing even at reduced supply voltages. This resolves the contradiction by adding a new control parameter that decouples write performance from supply voltage magnitude.
2Productivity
If negative voltage is generated to improve write operations, then write operation effectiveness is improved, but leakage currents and power consumption increase
Solution Approach 1:
The patent applies negative voltage selectively and locally - only to the specific bitline being written to during a given operation, while other bitlines remain at ground or positive voltage. This localized application minimizes the total leakage current across the memory array while maintaining effective write operations on the selected bitline. The write assist circuit ensures negative voltage is applied only where needed, resolving the contradiction between write effectiveness and energy loss.
3Area of moving object
If transistor dimensions are reduced to increase component density, then area consumption is reduced and component density increases, but write operation effectiveness deteriorates due to lower supply voltages
Solution Approach 1:
The patent compensates for the reduced effectiveness of write operations at low voltages by introducing negative voltage as an additional control parameter. This allows the memory array to maintain high write operation effectiveness even with reduced transistor dimensions and lower supply voltages, thereby enabling higher component density without sacrificing write performance.
Data Source
AI summary
A memory array includes a write assist circuit that helps ensure that write operations can be effectively and efficiently performed in spite of low voltage supply levels. The write assist circuit includes a negative voltage generator that generates a negative voltage during write operations and applies the negative voltage to a bitline coupled to a selected memory cell. The negative voltage helps ensure that data is quickly and properly written to the memory cell. The write assist circuit also includes a leakage control circuit that helps reduce leakages associated with generation of the negative voltage by applying the negative voltage to other portions of the memory array in order to reduce leakage currents.