Negative Boost Word Line Driver Area Reduction
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Solution Overview
Problem
Existing negative boost word line drivers face challenges in reducing area, power consumption, and voltage stress while maintaining high-speed and accurate operation, with conventional solutions either increasing the number of parts or compromising reliability.
Innovation Solution
The proposed negative boost word line driver design includes a reduced-part configuration with latched reset levels, OR circuits for synchronized address signals, and additional transistors for stress reduction, which allows for smaller area, higher speed, and lower power consumption without increasing the number of parts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional negative boost word line drivers are used, then the reset level can be shifted to negative voltage, but the number of parts increases and area expands
Solution Approach 1:
The patent merges the reset level control function into the existing word line driver circuit by adding a control terminal to the existing transistor structure, rather than using separate reset circuits. This integration allows negative boost voltage application while reducing the number of discrete parts and overall driver area.
Solution Approach 2:
The word line driver transistor is designed to perform multiple functions: normal word line driving and negative boost reset level control. By making the driver universal, the patent eliminates the need for dedicated reset circuits, thereby reducing area while maintaining reliability.
2Reliability
If additional transistors are added for stress reduction, then reliability improves, but device complexity and area increase
Solution Approach 1:
The patent applies local quality by adding stress reduction capabilities only where needed in the transistor structure (through modified gate control and substrate biasing) rather than uniformly increasing complexity across all transistors. This targeted approach maintains reliability while minimizing overall device complexity.
3Area of stationary object
If the number of parts is reduced for smaller area, then area decreases, but voltage stress and reliability may worsen
Solution Approach 1:
The patent extracts the voltage stress management function from separate protective circuits and integrates it directly into the transistor operation through substrate bias control and gate voltage management. This extraction and integration reduces part count and area while maintaining stress management capability.
4Device complexity
If conventional word line drivers are used without latched reset levels, then circuit simplicity is maintained, but reset level accuracy and speed deteriorate
Solution Approach 1:
The patent implements latched reset levels that prepare and hold the negative boost voltage state in advance before word line activation. This preliminary action ensures accurate and fast reset level establishment without requiring complex real-time control circuits during operation.
Data Source
AI summary
In order to latch and store a word line reset level voltage (negative voltage) which is set during reset operation, a word line driver includes PMOS transistors and NMOS transistors. The word line driver further includes a stress-reducing PMOS transistor and an NMOS transistor, and also a word line bias control circuit which controls and activates a supply bias during setting of a word line, start of resetting, and a reset period.