Negative Voltage Management Module for Non-Volatile Memory Address Decoder
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Solution Overview
Problem
The existing address-decoding solutions for non-volatile memory devices face challenges in effectively managing negative voltages, leading to ripple issues that can jeopardize memory operations due to capacitive coupling, affecting the biasing of word lines during read/verify operations.
Innovation Solution
A negative voltage management module is introduced, comprising a charge-pump stage, a control stage, and a regulator stage, which generates a regulated negative voltage with reduced ripple by using a configuration signal to control the charge-pump stage and produce a boosted negative voltage, subsequently converting it into a regulated voltage with minimal disturbance for biasing word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a charge-pump stage is used to generate boosted negative voltage, then the negative voltage can be generated for address decoder operation, but ripple is introduced into the negative voltage that can jeopardize memory operations
Solution Approach 1:
A regulator stage is introduced as an intermediary component between the charge-pump stage and the address decoder. This regulator stage processes the boosted negative voltage from the charge-pump and outputs a filtered, stable negative voltage with reduced ripple, thereby mediating the harmful effect of ripple while preserving the voltage boosting function.
Solution Approach 2:
The ripple component is extracted and removed from the boosted negative voltage through the regulator stage. The regulator separates the useful negative voltage signal from the harmful ripple component, delivering only the clean voltage to the address decoder while discarding or shunting the ripple.
2Object-affected harmful factors
If the charge-pump stage is sized larger to reduce ripple, then ripple reduction is achieved, but the area occupied by the charge-pump stage increases
Solution Approach 1:
The voltage regulation function is segmented into a separate regulator stage, independent from the charge-pump stage. This allows the charge-pump to be optimized for voltage boosting with minimal area, while the regulator handles the ripple reduction function, achieving overall ripple reduction without increasing charge-pump area.
Solution Approach 2:
The regulator stage serves as an intermediary that performs the ripple reduction function externally, allowing the charge-pump stage to remain compact. The regulator processes the charge-pump output and delivers cleaned voltage, enabling ripple reduction without requiring the charge-pump itself to be large.
3Reliability
If a regulator stage is added to reduce ripple, then memory operation reliability is improved, but the device complexity increases
Solution Approach 1:
A regulator stage is introduced as an intermediary component between the charge-pump stage and the address decoder. This regulator stage processes the boosted negative voltage from the charge-pump and outputs a filtered, stable negative voltage with reduced ripple, thereby mediating the harmful effect of ripple while preserving the voltage boosting function.
4Device complexity
If ripple in negative voltage is not reduced, then simpler circuit design is maintained, but errors in memory operations occur due to capacitive coupling affecting word line biasing
Solution Approach 1:
A regulator stage is introduced as an intermediary component between the charge-pump stage and the address decoder. This regulator stage processes the boosted negative voltage from the charge-pump and outputs a filtered, stable negative voltage with reduced ripple, thereby mediating the harmful effect of ripple while preserving the voltage boosting function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces ripple in the negative voltage used for reference voltage generation, preventing errors in memory operations and allowing for more efficient sizing of the charge-pump stage, while enabling two distinct negative voltage values from a single control signal, enhancing the reliability and efficiency of memory operations.
Implementation Method 1
a charge-pump stage configured to generate a boosted negative voltage
Implementation Method 2
A negative voltage management module has a regulator stage, designed to receive the boosted negative voltage from the charge-pump stage and generate a regulated negative voltage for the decoding stage, having a lower ripple as compared to the boosted negative voltage
Data Source
AI summary
An address decoder circuit is designed to address and bias memory cells of a memory array of a non-volatile memory device. The address decoder circuit includes a charge-pump stage configured to generate a boosted negative voltage. A control stage is operatively coupled to the charge-pump stage for controlling switching on/off thereof as a function of a configuration signal that determines the value of the boosted negative voltage. A decoding stage is configured so as to decode address signals received at its input and generate biasing signals for addressing and biasing the memory cells. A negative voltage management module has a regulator stage, designed to receive the boosted negative voltage from the charge-pump stage and generate a regulated negative voltage for the decoding stage, having a lower ripple as compared to the boosted negative voltage generated by the charge-pump stage.