Nested Cavity IC Packages for Reduced Z-Height
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Solution Overview
Problem
Conventional IC packages face challenges in minimizing overall z-height due to the increasing size constraints, thermal, and mechanical stress, which affect signal performance and power delivery in compact devices like mobile and tablet devices.
Innovation Solution
The implementation of cavities in both substrates and circuit boards allows for the nesting of dies, reducing the overall thickness by lowering the die-attach plane and enhancing electrical connectivity, thereby improving power delivery and signal speed while maintaining mechanical integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If components are mounted on the surfaces of substrate and circuit board, then electrical connectivity and mechanical support are achieved, but the overall z-height increases
Solution Approach 1:
The patent implements cavities in the substrate and circuit board that allow dies to be nested within them. The first die is nested in the first cavity of the substrate, and the substrate with the die is then nested into the second cavity of the circuit board. This nesting arrangement reduces the overall z-height while maintaining electrical connectivity through conductive contacts that extend into the cavities and make contact with the dies.
Solution Approach 2:
The patent transitions from a conventional surface-mount arrangement to a multi-level cavity-based arrangement. By creating cavities at different depths in the substrate and circuit board, the design utilizes the vertical dimension more efficiently, allowing components to be positioned at different z-levels rather than all on the surface, thereby reducing the overall package height.
2Length of moving object
If z-height is reduced to meet size constraints, then device compactness is improved, but thermal and mechanical stress increases
Solution Approach 1:
The nested cavity structure provides mechanical support at multiple levels. The cavities are formed with specific depths and configurations that allow dies to be securely positioned while distributing mechanical stresses. The conductive contacts and underfill material within the cavities provide additional mechanical support and stress distribution, reducing the risk of damage from thermal expansion and mechanical loads despite the reduced overall height.
3Length of moving object
If z-height is reduced to meet size constraints, then device compactness is improved, but power delivery and signal performance deteriorate
Solution Approach 1:
The patent utilizes the vertical dimension through multi-level cavities to reduce z-height while maintaining effective power delivery paths. The conductive contacts are positioned to provide low-inductance power delivery to the dies nested in the cavities. By optimizing the vertical arrangement of conductive contacts and cavities, the design achieves compactness without sacrificing power delivery performance.
Data Source
AI summary
Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. For example, in some embodiments, a microelectronic assembly may include a substrate having a surface including a first cavity; a first die at least partially nested in the first cavity and electrically coupled to the substrate; and a circuit board having a surface including a second cavity, wherein the surface of the substrate is electrically coupled to the surface of the circuit board, and wherein the first die extends at least partially into the second cavity in the circuit board.