Nested Via Interconnect Layout for Dense Shielded Package Substrates
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Solution Overview
Problem
There is a need for improved electrical performance and reduced size in packages comprising substrates and integrated devices, particularly in achieving higher interconnect density and providing electromagnetic interference shielding without increasing the overall size.
Innovation Solution
The use of partial concentric planar cross section via interconnects, including a first via interconnect with a partial concentric cross section and a second via interconnect laterally surrounding it, enhances interconnect density and provides additional electrical paths and shielding, utilizing edge regions of the substrate without increasing its size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional via interconnects with simple cross sections are used, then the manufacturing process is simple, but the interconnect density and electrical performance are limited
Solution Approach 1:
The patent implements nested via interconnect structures where a first via interconnect with a partial concentric planar cross section is surrounded by a second via interconnect with a partial ring planar cross section. This nesting arrangement increases interconnect density within the same substrate area without requiring additional lateral space, effectively resolving the contradiction between density and complexity by organizing multiple interconnects in a compact concentric configuration
Solution Approach 2:
The patent transitions from traditional two-dimensional planar interconnect layouts to a three-dimensional nested configuration. By stacking via interconnects with different cross-sectional geometries (partial concentric and partial ring) in vertical alignment, the design exploits the vertical dimension to achieve higher interconnect density without proportionally increasing the substrate footprint, thereby improving productivity while managing structural complexity
2Productivity
If more via interconnects are added to increase density, then electrical performance improves, but the overall package size increases
Solution Approach 1:
The nested via interconnect configuration allows multiple interconnects to occupy the same lateral footprint on the substrate. The first via interconnect with partial concentric cross section and the second via interconnect with partial ring cross section are positioned concentrically, enabling high interconnect density without expanding the substrate area, thus resolving the contradiction between density and package size
Solution Approach 2:
By utilizing vertical stacking and three-dimensional spatial arrangement of via interconnects, the patent achieves increased interconnect density within the same planar substrate area. The nested configuration exploits the vertical dimension and radial spacing to pack more interconnects into a compact footprint, preventing package size expansion while improving electrical performance
3Object-affected harmful factors
If via interconnects are added for shielding, then electromagnetic interference protection improves, but manufacturing complexity increases
Solution Approach 1:
The nested via interconnect structure provides inherent electromagnetic shielding where the outer second via interconnect with partial ring cross section surrounds the inner first via interconnect with partial concentric cross section. This concentric arrangement creates a shielded configuration that protects against electromagnetic interference while maintaining a compact structure, resolving the contradiction between shielding effectiveness and manufacturing complexity by integrating shielding functionality into the interconnect geometry itself
Solution Approach 2:
The via interconnects serve multiple functions simultaneously: they provide electrical connectivity and embedded electromagnetic shielding. The nested configuration of the first and second via interconnects creates a shielded structure that protects sensitive signals while maintaining standard manufacturing processes, thereby achieving EMI protection without proportionally increasing device complexity
Data Source
AI summary
A package comprising an integrated device; and a substrate coupled to the integrated device through at least a plurality of solder interconnects. The substrate comprises a plurality of interconnects. The plurality of interconnects comprises a first via interconnect comprising a partial concentric planar cross section; and a second via interconnect comprising a partial ring planar cross section, wherein the second via interconnect laterally surrounds at least part of the first via interconnect.


