Network Interface Device Clock Synchronization via Jitter Monitoring

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Solution Overview

Problem

In distributed computing systems, clock uncertainty due to unsynchronized clock signals across devices can lead to performance issues and increased time for workload completion, as seen in distributed databases where retries for entry access are delayed.

Innovation Solution

A network interface device synchronizes clock signals by comparing received clock signals with a reference clock signal, determining tolerance ranges, and performing actions such as migrating services, adjusting clock signals, or disabling devices to ensure synchronization, using protocols like IEEE 1588 Precision Time Protocol (PTP) for time synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If devices utilize independent clock signals without synchronization, then each device can operate autonomously with its own timing, but clock uncertainty arises that impacts distributed system performance and increases workload completion time

Engineering Contradiction:
Improvedevice autonomyVSAvoidworkload completion time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system implements a feedback mechanism where the first device monitors the clock signal from the second device, compares it against its own clock signal, and generates adjustment instructions based on the detected difference. This closed-loop feedback enables automatic synchronization that reduces clock uncertainty and workload completion time while preserving device autonomy.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The first device acts as an intermediary by receiving the second device's clock signal, processing it through comparison and analysis, and generating corrective instructions. This intermediary role enables indirect synchronization where the second device can be adjusted without direct intervention, maintaining autonomy while achieving coordination.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If clock signals are synchronized across devices, then clock uncertainty is reduced improving distributed system performance, but additional monitoring and adjustment mechanisms are required increasing system complexity

Engineering Contradiction:
Improvedistributed system performanceVSAvoidsynchronization mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The second device performs self-service by autonomously monitoring its own clock signal output and automatically adjusting it based on instructions from the first device. This self-service approach reduces the need for complex external synchronization infrastructure, achieving reliable clock synchronization with minimal added system complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The monitoring and adjustment functions are merged into the existing device architecture rather than being implemented as separate external systems. The first device combines clock signal reception, difference detection, and instruction generation in a unified approach that improves reliability without proportionally increasing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If the first device continuously monitors and adjusts the second device's clock signal, then clock synchronization is maintained improving time precision, but additional processing and communication overhead is introduced

Engineering Contradiction:
Improveclock synchronization precisionVSAvoidprocessing overhead
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The system implements partial monitoring where the first device focuses on detecting specific clock signal characteristics (rising/falling edges) rather than continuously analyzing the entire signal waveform. This partial action approach maintains sufficient synchronization precision while reducing processing overhead and energy consumption compared to exhaustive monitoring.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system changes the parameter being monitored from continuous analog signal analysis to discrete event detection (clock edges). By focusing on specific parameter changes rather than continuous parameter tracking, the system achieves adequate synchronization precision with reduced processing requirements and lower energy consumption.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230077631A1Time domain monitoring and adjustment by a network interface device
Publication Date: 2023.03.16 INTEL CORP
  • US20230077631A1 patent drawing
  • US20230077631A1 patent drawing
  • US20230077631A1 patent drawing

AI summary

Examples described herein relate to a network interface device that includes a host interface; a network interface; and circuitry to: receive time information of a device that executes a service and based on the time information being outside of a permitted jitter range for the service, perform one or more actions to cause execution of the service on a device that operates based on a clock signal within a permitted jitter range.