Neural Network Memory Circuit With Matched Reference-Current Cells
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Solution Overview
Problem
Nonvolatile memory cells used in neural network circuits face challenges in accurately reading information over long periods due to deteriorated charge retention characteristics, leading to erroneous threshold voltage changes and electric current determinations.
Innovation Solution
Incorporating a plurality of reference-current cells with the same cross-sectional structure as nonvolatile memory cells, these reference cells are used to compare electric currents, ensuring accurate information retrieval by maintaining consistent charge retention characteristics and voltage thresholds, even as the number of rewriting operations increases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If nonvolatile memory cells are used for long-term information storage in neural network circuits, then data retention capability is improved, but charge retention characteristics deteriorate due to repeated rewriting operations, causing threshold voltage changes and reading errors
Solution Approach 1:
The patent creates a copy of the memory cell structure by introducing reference current cells that have the same cross-sectional structure as the nonvolatile memory cells. These reference cells are used to generate reference currents that compensate for threshold voltage changes in the actual memory cells, thereby maintaining reliable reading operations even after repeated rewriting operations degrade the charge retention characteristics of the memory cells.
2Adaptability or versatility
If the number of rewriting operations on nonvolatile memory cells is increased to improve neural network learning capability, then training flexibility is improved, but threshold voltage stability deteriorates, leading to erroneous information reading
Solution Approach 1:
The patent implements a feedback mechanism where reference currents generated from reference current cells are used to compensate for threshold voltage changes in the nonvolatile memory cells. The sense amplifier compares the current through the memory cell with the reference current, and this comparison feedback allows the system to maintain accurate reading operations even when threshold voltages drift due to repeated rewriting operations, thus preserving neural network training flexibility.
3Productivity
If nonvolatile memory cells are used to achieve neural network circuits, then hardware efficiency is improved, but reading accuracy deteriorates due to threshold voltage drift from charge retention degradation
Solution Approach 1:
The patent creates reference current cells that are structural copies of the nonvolatile memory cells. These reference cells experience the same threshold voltage drift as the actual memory cells but are used solely to generate reference currents for comparison. This copying approach allows the system to maintain high reading accuracy by comparing the memory cell current with a reference current that has undergone identical degradation, thereby preserving both neural network processing efficiency and reading accuracy.
Data Source
AI summary
In a case of achievement of a neural network circuit using a plurality of nonvolatile memory cells, a technique capable of accurately reading information recorded in the plurality of nonvolatile memory cells is provided. A semiconductor device includes: a plurality of nonvolatile memory cells; a plurality of reference-current cells; and a sense amplifier comparing an electric current flowing in each of the plurality of nonvolatile memory cells and an electric current flowing in each of the plurality of reference-current cells. In this case, each cross-sectional structure of the plurality of reference-current cells is the same as each cross-sectional structure of the plurality of nonvolatile memory cells. The writing operation or the erasing operation is also performed to each of the plurality of reference-current memory cells when the writing operation or the erasing operation is performed to each of the plurality of nonvolatile memory cells.


