Neural Network Circuit Weight Storage Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional neural network computation circuits face limitations in storing large connection weight coefficients due to restricted analog resistance value ranges in nonvolatile memory elements, leading to inaccurate multiply-accumulate operations and reliability issues with variable resistance nonvolatile memories.
Innovation Solution
A neural network computation circuit utilizing at least two bits of semiconductor storage elements for each connection weight coefficient, where the first and second semiconductor storage elements store positive and negative current values respectively, enabling accurate and reliable computation by summing current values from these elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If nonvolatile memory elements with limited analog resistance value range are used, then power consumption is reduced and neural network computation can be performed, but large connection weight coefficients cannot be stored accurately
Solution Approach 1:
The patent divides the storage of connection weight coefficients into multiple nonvolatile memory elements. Each memory element stores a portion of the total current value, and multiple elements are connected in parallel to collectively represent the full range of connection weight coefficients. This segmentation allows accurate storage of large coefficients while maintaining the low power consumption benefit of nonvolatile memory.
2Productivity
If plural analog voltages are applied to nonvolatile memory elements for multiply-accumulate operation, then neural network computation is performed, but parasitic resistance and control circuit saturation cause inaccurate computation
Solution Approach 1:
The patent segments the current path by using multiple nonvolatile memory elements in parallel, each handling a portion of the computation. This distribution reduces the current density and voltage requirements for any single memory element, thereby reducing the impact of parasitic resistance and preventing control circuit saturation while maintaining overall computation accuracy.
Solution Approach 2:
The patent introduces current value conversion circuits as intermediaries between the nonvolatile memory elements and the computation output. These intermediary circuits accurately convert and sum the current values from multiple memory elements, compensating for parasitic resistance effects and ensuring precise multiply-accumulate operation results.
3Reliability
If variable resistance nonvolatile memories are used, then power consumption is reduced, but reliability issues occur with large connection weight coefficients
Solution Approach 1:
The patent segments the storage function across multiple nonvolatile memory elements, each operating within safe current and voltage ranges. This segmentation improves reliability by preventing excessive stress on individual memory elements while maintaining the low power consumption characteristic of nonvolatile memory technology.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance and reliability of neural network computation by allowing for larger connection weight coefficients and reducing the impact of parasitic resistance and control circuit saturation, improving the accuracy of multiply-accumulate operations.
Implementation Method 1
at least two bits of semiconductor storage elements provided for each of the plurality of connection weight coefficients, the at least two bits of semiconductor storage elements including a first semiconductor storage element and a second semiconductor storage element that are provided for storing the connection weight coefficient
Implementation Method 2
Each of the plurality of connection weight coefficients corresponds to a total current value that is a sum of a current value of current flowing through the first semiconductor storage element and a current value of current flowing through the second semiconductor storage element
Data Source
AI summary
A neural network computation circuit holds a plurality of connection weight coefficients in one-to-one correspondence with a plurality of input data items, and outputs output data according to a result of a multiply-accumulate operation on the plurality of input data items and the plurality of connection weight coefficients in one-to-one correspondence, and includes at least two bits of semiconductor storage elements provided for each of the plurality of connection weight coefficients, the at least two bits of semiconductor storage elements including a first semiconductor storage element and a second semiconductor storage element that are provided for storing the connection weight coefficient. Each of the plurality of connection weight coefficients corresponds to a total current value that is a sum of a current value of current flowing through the first semiconductor storage element and a current value of current flowing through the second semiconductor storage element.