Neural Network Lookup Table Generation for Circuit Simulation

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Solution Overview

Problem

Existing circuit simulators face inefficiencies due to the need to generate and store precomputed lookup tables (LUTs) for various semiconductor devices, leading to increased simulation time and unnecessary resource usage, as they are stored in non-volatile memory and require generation for each device size combination.

Innovation Solution

A method and device for processing a neural network model that generates a lookup table (LUT) in real-time when a source file is read, storing it in volatile memory and only allocating space as needed, eliminating the need for pre-generated LUTs and reducing read time by utilizing volatile memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If LUT is stored in non-volatile memory device, then LUT can be persisted, but read time of LUT becomes long

Engineering Contradiction:

Improveread time of LUTVSAvoidpersistence of LUT

Core Design Contradiction:

Loss of timeVSReliability

Solution Approach 1:

The LUT is generated in advance during system initialization or preprocessing and loaded into volatile memory before simulation begins. This preliminary action ensures the LUT is readily available in fast memory during simulation operations, eliminating read time delays while maintaining data persistence through the preprocessing step.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

Volatile memory serves as an intermediary between the non-volatile storage (where LUT generation logic resides) and the circuit simulator (which consumes the LUT). The LUT is transferred to volatile memory as an intermediate step, providing both persistence through original storage and fast access through the intermediary volatile memory location.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If all LUTs are generated in advance for each semiconductor device size, then LUT availability is ensured, but computational resources are wasted on unnecessary LUT generation

Engineering Contradiction:

ImproveLUT availabilityVSAvoidcomputational resources for LUT generation

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

Instead of generating all possible LUTs for every semiconductor device size combination, the system generates only the specific LUTs that are actually needed for the current simulation circuit. This partial action approach generates LUTs on-demand based on the actual device instances in the circuit, avoiding waste of computational resources on unnecessary LUT generation while ensuring availability of required LUTs.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS20240160950A1Method and device for processing neural network model for circuit simulator

Publication Date: 2024.05.16 ALSEMY INC

AI summary

A method of processing a neural network model for a circuit simulator can include reading a source file input to a circuit simulator, reading a neural network file when the source file is read, and generating a lookup table using size information of a semiconductor device included in the source file and parameters included in the neural network file.