Physical Realisation TRIZ Cases
- Neural Network Parameter Decomposition for Hardware Optimization
Segmenting parameters into sub-values with varying precision levels reduces energy consumption while maintaining performance.
- Programmable LUT for Neural Network Activation Approximation
A programmable look-up table stores linear segment parameters to approximate non-linear activation functions in neural networks.
- All-Optical Nonlinear Activation Functions for Deep Learning
Optical parametric oscillation in nonlinear materials implements ReLU functions, reducing energy-time product to 1.2×10−27 J s.
- Hybrid Optical Neural Network Training via Linear Layer
A hybrid training method updates optical neural network weights using real signal propagation.
- Neural Network Weight Update via Local Activity Differences
Activity-difference training updates neural network weights using local neuron signals, reducing energy consumption and improving biological plausibility.
- AI Chip Parallel Operation Circuits Power Reduction
Shared operation circuits reduce power consumption while maintaining computational throughput.
- Attention Matrix Computation via Key Reordering
Sorting key columns reduces energy consumption by minimizing state transitions in microring resonator accelerators.
- Neural Network Data Conversion for MV Product Acceleration
A data conversion apparatus transforms neural network structural data to enable high-speed matrix matrix product execution on standard hardware.
- Fixed-Point Quantized Neural Network Training
Quantizing weights to fixed-point values reduces hardware complexity and energy consumption while maintaining calculation precision.
- Neural Network Coefficient Matrix Compression for Small Buffer Devices
A processing unit divides and compresses neural network coefficient matrices using flexible range settings in non-filter dimensions.
- Neural Network Unit Rotater for High-Throughput Processing
A neural network unit employs a multiplexed register rotater to shift data rows across processing elements.
- Deep Learning Neural Network Storage Security via Dummy Nodes
Separating real and dummy node parameters into different storage areas prevents unauthorized inference when hackers access partial model data.
- Neural Network Coefficient Sparsity for Memory Footprint Reduction
Applying sparsity parameters to neural network coefficients reduces memory footprint and computational demands while maintaining measurement precision.
- Post-Training Quantization Model Selection via Indirect Metrics
Automated post-training quantization model selection using indirect metrics to identify optimal configurations.
- Deep Learning Network Scheduling via Parallel GPU Execution
A scheduling framework segments deep learning operations across multiple GPU cores to accelerate computational throughput.
- Recomputing Skip Connection Tensors in Neural Networks
Neural processing units recompute skip connection tensors from input data and layer weights to reduce memory footprint.
- Neural Network Lookup Table Generation for Circuit Simulation
A neural network model generates lookup tables in volatile memory during circuit simulation reads.
- Edge Server Deep Learning Model Retraining via Semi-Federated Data Selection
Semi-federated data selection reduces upload traffic and training time by filtering edge server inputs before retraining deep learning models.
- AI Accelerator Frequency Control via Runtime Signals
Runtime software issues a frequency control signal to synchronize multiple accelerators, reducing idle times and optimizing power consumption.