Neuromorphic Core Duplication via Firing Characteristic Transfer
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Solution Overview
Problem
Training multiple neuromorphic cores is time-consuming due to the need for substantial time with large amounts of labeled and unlabeled data using methods like STDP and back-propagation, making it prohibitive to duplicate functionally identical cores.
Innovation Solution
Transfer the firing characteristic from one neuromorphic core to another, adjusting the resistive memory element's resistance, refractory time, and charge rate to match a target firing characteristic, allowing duplication of functionally identical cores without full training.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional training methods (STDP and back-propagation) are used to train multiple neuromorphic cores, then the cores achieve accurate firing characteristics, but the training time becomes prohibitively long
Solution Approach 1:
The patent extracts the essential firing characteristics (synaptic weights, refractory periods, charge rates) from a trained source core and copies them to target cores. This allows target cores to achieve accurate firing characteristics without undergoing the complete time-consuming training process, effectively copying the functional behavior of trained cores to new instances
Solution Approach 2:
The patent performs preliminary training on a single source core to establish optimal firing characteristics. These pre-determined parameters are then transferred to multiple target cores, eliminating the need to repeat the lengthy training process for each core and significantly reducing total training time
2Reliability
If full training is performed on each neuromorphic core, then the cores achieve independent operational capability, but the resource consumption and training complexity increase substantially
Solution Approach 1:
Instead of independently training each core, the patent copies verified operational parameters from a source core to target cores. This reduces training complexity while maintaining operational reliability, as the copied parameters have already been validated through the source core's training process
Solution Approach 2:
The patent creates a universal training approach where one source core serves multiple target cores. The source core's trained parameters become a reusable template that can be transferred to any number of target cores, making the training process scalable and reducing overall system complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the time required to train multiple neuromorphic cores by transferring learned synaptic weights and parameters, enabling efficient duplication of functionally identical cores.
Implementation Method 1
A postsynaptic capacitor is configured to build up a leaky integrate and fire (LIF) charge. The postsynaptic capacitor includes a capacitor voltage proportional to the LIF charge.
Implementation Method 2
A first memory cell includes a resistive memory element programmable to a memory resistance
Implementation Method 3
An axon LIF pulse generator is configured to activate a LIF discharge path from the postsynaptic capacitor through the resistive memory element when the axon LIF pulse generator generates axon LIF pulses.
Data Source
AI summary
A neuromorphic memory circuit including a memory cell with a programmable resistive memory element. A postsynaptic capacitor builds up a leaky integrate and fire (LIF) charge. An axon LIF pulse generator activates a LIF discharge path from the postsynaptic capacitor through the resistive memory element when the axon LIF pulse generator generates axon LIF pulses. A postsynaptic comparator compares the capacitor voltage to a threshold voltage and generates postsynaptic output pulses when the capacitor voltage passes the threshold voltage. The postsynaptic output pulses include a postsynaptic firing characteristic dependent on a frequency of the axon LIF pulses. A refractory circuit prevents the postsynaptic comparator from generating additional postsynaptic output pulses until a refractory time passes since a preceding postsynaptic output pulse. A training circuit adjusts the postsynaptic firing characteristic to match a target firing characteristic.