Expandable Neuromorphic Synapse Arrays With Signal-Preserving Connections
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Solution Overview
Problem
Existing neuromorphic computing systems face challenges in forming synapse devices that meet the requirements for ideal analog behavior, such as linear and symmetrical conductance update and large on/off ratio, and in configuring arrays of appropriate size for processing functions.
Innovation Solution
A neuromorphic circuit design that includes connecting blocks with complementary pass transistor logic to expand the size of synapse element arrays, allowing for flexible arrangement and connection of neuron and synapse arrays without signal level change, and incorporates control logic for operations like pruning and dropout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of synapse array is increased to process more functions, then computational capability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The synapse array is divided into multiple smaller synapse array blocks that can be independently configured and connected. Each block contains a subset of synapse circuits, and multiple blocks are connected through connecting blocks to form larger virtual arrays. This segmentation allows the system to achieve large-scale computational capability while maintaining manageable complexity at each individual block level.
Solution Approach 2:
The patent introduces a third dimension by connecting synapse array blocks not only in row and column directions but also through vertical stacking and multi-layer connections. The connecting blocks enable connections between synapse arrays at different levels, creating a three-dimensional architecture that increases computational capability without proportionally increasing planar complexity.
2Productivity
If the size of synapse array is increased to achieve desired functionality, then processing capability is improved, but signal loss and interference increase
Solution Approach 1:
Connecting blocks serve as intermediary components between adjacent synapse array blocks. These connecting blocks include signal transmission paths with level restoration capabilities, ensuring that signals maintain their integrity when transitioning between blocks. The intermediaries compensate for potential signal degradation over long transmission paths in large arrays.
Solution Approach 2:
The signal transmission paths in the connecting blocks are designed to maintain consistent signal levels across all synapse array blocks. By ensuring equipotentiality in signal transmission, the system prevents signal loss and maintains uniform signal quality throughout the expanded array, enabling reliable operation at large scales.
3Measurement precision
If conventional synapse devices are used to achieve ideal analog behavior, then learning accuracy is improved, but device formation difficulty increases
Solution Approach 1:
The patent employs parameter changes in the synapse circuit design, specifically using complementary pass transistor logic with controlled threshold voltages. By adjusting transistor parameters such as threshold voltage and transconductance, the synapse circuits achieve ideal analog behavior with linear and symmetrical conductance updates. This approach maintains manufacturing feasibility while achieving the desired analog characteristics through careful parameter selection rather than requiring complex device structures.
Data Source
AI summary
A neuromorphic circuit according to example embodiments of inventive concepts includes a first neuron array including a plurality of neuron circuits generating a spike signal; a first synapse array including a plurality of first synapse circuits to process and output the spike signal transmitted from the first neuron array; a second synapse array including a plurality of second synapse circuits; a first connecting block positioned between the first synapse array and the second synapse array and connecting the first synapse array and the second synapse array in response to a control signal; and a control logic to generate the control signal. The neuromorphic circuit may easily expand the size of the synapse element array to a desired size by using a connecting block.