Neuromorphic Synapse Gating Pulse Resistance Control
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Solution Overview
Problem
Current neuromorphic devices face challenges in finely controlling the overlap time between pre-synaptic and post-synaptic pulses, which hinders the adjustment of the resistance change ratio of synapses, thereby limiting the learning and recognition abilities of these devices.
Innovation Solution
A neuromorphic device design that includes a synapse comprising a transistor and a memristor, with a gating pulse system that allows for the adjustment of resistance change ratios by varying the amplitude, shape, and generation time of pulses, enabling precise control over the memristor's current value and resistance changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If Spike Timing-Dependent Plasticity (STDP) is used to change resistance value according to overlap time between pre-synaptic and post-synaptic pulses, then learning capability is improved, but the ability to finely control overlap time and adjust resistance change ratio deteriorates
Solution Approach 1:
A gating pulse is introduced as an intermediary signal that mediates between pre-synaptic and post-synaptic pulses. The gating pulse controls the timing window during which the pre-synaptic pulse can affect the memristor, thereby enabling precise control of the effective overlap time without requiring direct control of both pulse timings. This resolves the contradiction by providing a simple control mechanism (gating pulse timing) that achieves fine control of the interaction between neural signals.
2Manufacturing precision
If overlap time between pre-synaptic and post-synaptic pulses is not precisely controllable, then resistance change ratio of synapse deteriorates, but device complexity is reduced
Solution Approach 1:
The gating pulse serves as a control intermediary that simplifies the device architecture while achieving precise resistance change ratio control. Instead of requiring complex timing control circuits for both pre-synaptic and post-synaptic pulses, the invention uses a single gating pulse signal that defines the integration window, thereby achieving precise control with minimal added device complexity.
Solution Approach 2:
The invention controls the resistance change ratio by changing the timing parameter of the gating pulse relative to the pre-synaptic and post-synaptic pulses. By adjusting the gating pulse timing, the effective integration window is modified, which directly controls the amount of charge accumulated in the memristor and thus the resistance change ratio, achieving precise control through a single parameter adjustment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for delicate training of the memristor, enhancing the learning and recognition capabilities of the neuromorphic device by precisely controlling the resistance change ratio, thereby improving the device's performance in pattern recognition systems.
Implementation Method 1
a gate electrode of the first transistor may be electrically connected to a corresponding one of the first control lines
Implementation Method 2
A learning level of a synapse in the neuromorphic device may be set by changing a resistance value of the synapse to various levels
Data Source
AI summary
A neuromorphic device may include: a plurality of pre-synaptic neurons; row lines extending in a row direction from the plurality of pre-synaptic neurons; a plurality of post-synaptic neurons; column lines extended in a column direction from the plurality of post-synaptic neurons; a plurality of synapses arranged at intersections between the row lines and the column lines; a plurality of first control blocks; and first control lines extending from the control blocks. The first control lines may be electrically connected to the plurality of synapses.