Neuromorphic Synapses with Multi-Level Carrier Traps

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Solution Overview

Problem

Current neuromorphic devices lack effective mechanisms to dynamically adjust resistance levels based on learning states, limiting their ability to mimic the adaptive properties of human synapses.

Innovation Solution

Incorporating a variable resistive layer with carrier traps distributed at multiple energy levels, along with blocking and barrier layers, to enable synapses to change resistance states in response to learning processes, allowing for multiple resistance levels and current changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a variable resistive layer with carrier traps distributed at multiple energy levels is used, then the device can dynamically adjust resistance levels to mimic brain-like functionality, but the device complexity increases

Engineering Contradiction:
Improveability to dynamically adjust resistance levelsVSAvoidstructural complexity of multi-layer configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The variable resistive layer is segmented into multiple energy levels with carrier traps distributed at different depths. This segmentation allows independent control of resistance at each energy level, enabling dynamic adjustment of overall resistance to mimic synaptic weight changes in the brain.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The device employs a composite structure combining variable resistive layer, upper blocking layer, and lower blocking layer. Each layer is made of specific materials with distinct properties (semiconductor materials with carrier traps, materials substantially lacking carrier traps) that work together to achieve complex resistance modulation while maintaining manageable device complexity.

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If carrier traps are distributed at multiple energy levels, then multiple resistance levels can be achieved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvenumber of resistance levelsVSAvoidprecision of carrier trap distribution
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent utilizes parameter changes in the energy levels and densities of carrier traps to achieve multiple resistance levels. By varying the depth and concentration of carrier traps at different energy levels, the device can programmatically control resistance states without requiring extremely tight manufacturing tolerances on physical dimensions.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If blocking layers are added to control carrier flow, then resistance control is improved, but the device complexity increases

Engineering Contradiction:
Improvecontrol over resistance statesVSAvoidnumber of layers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The upper and lower blocking layers are strategically positioned at specific interfaces within the variable resistive layer where carrier trap distributions change. These blocking layers provide localized control over carrier flow at critical regions, improving resistance state control without requiring blocking structures throughout the entire device.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables neuromorphic devices to adapt resistance levels and current flow based on learning processes, enhancing their ability to mimic brain-like functionality and improve pattern recognition systems.

Implementation Method 1

The variable resistive layer may include a plurality of carrier traps distributed at multiple energy levels

Methodology Applied
Scientific EffectCarrier traps:

Implementation Method 2

The upper blocking layer may include a semiconductor material that substantially lacks carrier traps

Methodology Applied
Scientific EffectBlocking layer effect:

Implementation Method 3

The upper barrier layer may include one or more of titanium (Ti), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), tungsten nitride (WN) and another barrier material

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS9773204B2Neuromorphic device including synapses having carrier traps distributed at multiple energy levels
Publication Date: 2017.09.26 SK HYNIX INC
  • US9773204B2 patent drawing
  • US9773204B2 patent drawing
  • US9773204B2 patent drawing

AI summary

A neuromorphic device having synapses may include: a top electrode; a bottom electrode; and a variable resistive layer disposed between the top electrode and the bottom electrode. The variable resistive layer may include a plurality of carrier traps distributed at multiple energy levels.