Neuromorphic Device Tile Allocation and Weight Redundancy
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Solution Overview
Problem
Current neuromorphic devices face challenges in improving versatility, arithmetic operation speed, and reducing power consumption while efficiently managing weight storage and input data processing across multiple layers in neural networks.
Innovation Solution
The neuromorphic device dynamically allocates cell tiles to layers based on the number of nodes and connection structure, redundantly stores weights, and inputs data in a divided manner to optimize performance, using cell arrays and analog-digital converters to execute neural network operations efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If weights are stored in a single cell tile, then storage space is saved, but arithmetic operation speed decreases due to sequential processing requirements
Solution Approach 1:
The patent divides the cell array into multiple cell tiles (first cell tile, second cell tile, etc.), each storing a portion of the weights. This segmentation allows parallel processing of different weight portions during arithmetic operations, thereby increasing operation speed while distributing the storage burden across multiple tiles.
Solution Approach 2:
The patent creates redundant copies of weight data across multiple cell tiles. Specifically, first weights are stored in the first cell tile and copied to the second cell tile, enabling simultaneous access to identical weight data from multiple tiles during arithmetic operations, thus improving processing speed without permanently increasing storage requirements.
2Productivity
If all input data bits are processed simultaneously, then arithmetic operation speed is maximized, but power consumption increases
Solution Approach 1:
The patent processes input data bits in periodic batches rather than all at once. The controller divides input data into multiple bit groups and processes them sequentially across different time periods, allowing the system to maintain high throughput while reducing peak power consumption by activating only the necessary cell tiles and circuitry for each batch.
Solution Approach 2:
The patent dynamically configures the operation mode of cell tiles based on the current processing requirements. Cell tiles can be dynamically activated or deactivated depending on which portions of the input data are being processed, allowing the system to adapt its resource allocation and power consumption to the actual computational needs at each moment.
3Adaptability or versatility
If cell tiles are fixed to specific layers, then device complexity is reduced, but versatility decreases when handling different neural network structures
Solution Approach 1:
The patent implements dynamic weight allocation where the controller can flexibly assign different cell tiles to different layers based on the specific neural network structure being processed. The matching information stored in the layer buffer enables the controller to dynamically determine which cell tiles should be activated for each layer, allowing the same hardware to adapt to various network architectures without physical reconfiguration.
Solution Approach 2:
The patent designs the cell tiles to be multi-functional, capable of serving different layers in different neural network configurations. By storing matching information that maps cell tiles to layers dynamically, the system achieves universal compatibility with various neural network structures, where the same cell tiles can be reused across different layers and different network architectures as needed.
4Measurement precision
If more cell tiles are allocated to layers with more nodes, then arithmetic operation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by allocating a greater number of cell tiles to layers that have more nodes and require higher computational precision. The controller uses matching information to identify which layers have larger node counts and dynamically assigns more cell tiles to those specific layers, ensuring that computational resources are concentrated where they are most needed for maintaining arithmetic accuracy.
Solution Approach 2:
The patent dynamically adjusts the number of active cell tiles assigned to each layer based on the node count of that layer. During operation, the controller can modify which cell tiles are activated for each layer according to the specific neural network structure being processed, allowing the system to optimize accuracy for layers with more nodes while keeping the overall device complexity manageable through software-controlled allocation.
Data Source
AI summary
A neuromorphic device includes a plurality of cell tiles, each of the plurality of cell tiles including a cell array including a plurality of memory cells storing weights of a neural network, a row driver connected to the plurality of memory cells through a plurality of row lines, and cell analog-digital converters (ADCs) connected to the plurality of memory cells through a plurality of column lines, and a controller configured to select, form the plurality of cell tiles, a plurality of valid cell tiles storing the weights, execute a neural network-based arithmetic operation based on the plurality of valid cell tiles, and redundantly store weights of a first layer among a plurality of layers included in the neural network in a plurality of first valid cell tiles that are divided into a plurality of first tile groups.