Neutron-Absorbing Passivation Layer for Digital Circuit SER Reduction
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Solution Overview
Problem
Digital integrated circuits are susceptible to soft errors caused by radiation, electromagnetic interference, and electrical noise, particularly due to alpha particles, cosmic rays, and neutron-induced boron fission, which can corrupt data without damaging the device.
Innovation Solution
Incorporating thermal neutron absorbing materials like Gd, Sm, Cd, or combinations thereof into passivation, polyimide, and oxide layers using Chemical Vapor Deposition or implantation to reduce soft error rates by blocking alpha particles and thermal neutrons.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If BPSG is used in chip fabrication, then manufacturing process is simplified, but soft error rate increases due to boron fission
Solution Approach 1:
The patent applies local quality by selectively doping specific regions of the passivation layer with neutron-absorbing materials (gadolinium, samarium, or cadmium) at concentrations of 1-100 atoms/cm³, while leaving other regions undoped. This localized approach reduces soft errors from boron fission in critical areas without requiring complete process redesign, thus maintaining manufacturing simplicity while improving reliability.
Solution Approach 2:
The patent creates a composite passivation layer structure combining conventional BPSG material with embedded neutron-absorbing materials (gadolinium, samarium, or cadmium). This composite structure maintains the beneficial fabrication properties of BPSG while adding neutron absorption capability to reduce boron fission-induced soft errors, resolving the contradiction between ease of manufacture and reliability.
2Reliability
If passivation layers are doped with thermal neutron absorbing materials, then soft error rate decreases, but device complexity increases
Solution Approach 1:
The patent merges the protection function against neutron-induced soft errors directly into the existing passivation layer structure by doping it with neutron-absorbing materials. Instead of adding separate protection layers or structures, the protective function is combined with the conventional passivation layer, reducing overall device complexity while maintaining reliability improvements.
3Reliability
If neutron-absorbing materials are added to protection layers, then radiation-induced charge generation is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent specifies precise doping concentration ranges (1-100 atoms/cm³) for neutron-absorbing materials in the passivation layer and provides guidance for controlling these parameters during fabrication. By establishing specific parameter windows and control methods, the patent enables manufacturers to achieve the desired radiation protection while maintaining feasible manufacturing precision standards.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The doping of thermal neutron absorbing materials in protection layers effectively reduces the soft error rate in digital circuits by mitigating the impact of radiation-induced charge generation, enhancing the reliability of integrated circuits.
Implementation Method 1
Incorporating thermal neutron absorbing materials like Gd, Sm, Cd, or combinations thereof into passivation, polyimide, and oxide layers using Chemical Vapor Deposition or implantation to reduce soft error rates by blocking alpha particles and thermal neutrons
Implementation Method 2
The doping of thermal neutron absorbing materials in protection layers effectively reduces the soft error rate in digital circuits by mitigating the impact of radiation-induced charge generation
Implementation Method 3
Incorporating thermal neutron absorbing materials like Gd, Sm, Cd, or combinations thereof into passivation, polyimide, and oxide layers using Chemical Vapor Deposition or implantation
Data Source
AI summary
Integrated Circuits and methods for reducing thermal neutron soft error rate (SER) of a digital circuit are provided by doping a protection layer on top of the metal layer and in physical contact with the metal layer of the digital circuit, wherein the protection layer is doped with additional thermal neutron absorbing material. The thermal neutron absorbing material can be selected from the group consisting of Gd, Sm, Cd, B, and combinations thereof. The protection layer may comprise a plurality of sub-layers among which a plurality of them containing additional thermal neutron absorbing material.


